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mmc: sdhci: add a quirk for tuning work around

This patch defines a quirk for tuning work
around for some sdhci host controller. It sets
both SDHCI_CTRL_EXEC_TUNING and SDHCI_CTRL_TUNED_CLK
for tuning.
It is a preparation and will be used by Fujitsu
SDHCI controller f_sdh30 driver.

Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Vincent Yang 10 年之前
父節點
當前提交
67d0d04a76
共有 2 個文件被更改,包括 4 次插入0 次删除
  1. 2 0
      drivers/mmc/host/sdhci.c
  2. 2 0
      include/linux/mmc/sdhci.h

+ 2 - 0
drivers/mmc/host/sdhci.c

@@ -1961,6 +1961,8 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
 
 
 	ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
 	ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
 	ctrl |= SDHCI_CTRL_EXEC_TUNING;
 	ctrl |= SDHCI_CTRL_EXEC_TUNING;
+	if (host->quirks2 & SDHCI_QUIRK2_TUNING_WORK_AROUND)
+		ctrl |= SDHCI_CTRL_TUNED_CLK;
 	sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
 	sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
 
 
 	/*
 	/*

+ 2 - 0
include/linux/mmc/sdhci.h

@@ -111,6 +111,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD	(1<<10)
 #define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD	(1<<10)
 /* Capability register bit-63 indicates HS400 support */
 /* Capability register bit-63 indicates HS400 support */
 #define SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400		(1<<11)
 #define SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400		(1<<11)
+/* forced tuned clock */
+#define SDHCI_QUIRK2_TUNING_WORK_AROUND			(1<<12)
 
 
 	int irq;		/* Device IRQ */
 	int irq;		/* Device IRQ */
 	void __iomem *ioaddr;	/* Mapped address */
 	void __iomem *ioaddr;	/* Mapped address */