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@@ -3544,6 +3544,42 @@ mlxsw_reg_qpdpm_dscp_pack(char *payload, unsigned short dscp, u8 prio)
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mlxsw_reg_qpdpm_dscp_entry_prio_set(payload, dscp, prio);
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}
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+/* QTCTM - QoS Switch Traffic Class Table is Multicast-Aware Register
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+ * ------------------------------------------------------------------
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+ * This register configures if the Switch Priority to Traffic Class mapping is
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+ * based on Multicast packet indication. If so, then multicast packets will get
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+ * a Traffic Class that is plus (cap_max_tclass_data/2) the value configured by
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+ * QTCT.
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+ * By default, Switch Priority to Traffic Class mapping is not based on
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+ * Multicast packet indication.
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+ */
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+#define MLXSW_REG_QTCTM_ID 0x401A
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+#define MLXSW_REG_QTCTM_LEN 0x08
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+
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+MLXSW_REG_DEFINE(qtctm, MLXSW_REG_QTCTM_ID, MLXSW_REG_QTCTM_LEN);
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+
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+/* reg_qtctm_local_port
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+ * Local port number.
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+ * No support for CPU port.
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+ * Access: Index
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+ */
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+MLXSW_ITEM32(reg, qtctm, local_port, 0x00, 16, 8);
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+
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+/* reg_qtctm_mc
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+ * Multicast Mode
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+ * Whether Switch Priority to Traffic Class mapping is based on Multicast packet
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+ * indication (default is 0, not based on Multicast packet indication).
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+ */
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+MLXSW_ITEM32(reg, qtctm, mc, 0x04, 0, 1);
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+
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+static inline void
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+mlxsw_reg_qtctm_pack(char *payload, u8 local_port, bool mc)
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+{
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+ MLXSW_REG_ZERO(qtctm, payload);
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+ mlxsw_reg_qtctm_local_port_set(payload, local_port);
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+ mlxsw_reg_qtctm_mc_set(payload, mc);
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+}
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+
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/* PMLP - Ports Module to Local Port Register
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* ------------------------------------------
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* Configures the assignment of modules to local ports.
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@@ -8761,6 +8797,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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MLXSW_REG(qrwe),
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MLXSW_REG(qpdsm),
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MLXSW_REG(qpdpm),
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+ MLXSW_REG(qtctm),
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MLXSW_REG(pmlp),
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MLXSW_REG(pmtu),
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MLXSW_REG(ptys),
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