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@@ -44,17 +44,17 @@ static DEFINE_PER_CPU(struct perf_event *, bp_on_reg[ARM_MAX_BRP]);
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static DEFINE_PER_CPU(struct perf_event *, wp_on_reg[ARM_MAX_WRP]);
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/* Number of BRP/WRP registers on this CPU. */
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-static int core_num_brps;
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-static int core_num_wrps;
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+static int core_num_brps __ro_after_init;
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+static int core_num_wrps __ro_after_init;
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/* Debug architecture version. */
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-static u8 debug_arch;
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+static u8 debug_arch __ro_after_init;
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/* Does debug architecture support OS Save and Restore? */
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-static bool has_ossr;
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+static bool has_ossr __ro_after_init;
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/* Maximum supported watchpoint length. */
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-static u8 max_watchpoint_len;
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+static u8 max_watchpoint_len __ro_after_init;
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#define READ_WB_REG_CASE(OP2, M, VAL) \
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case ((OP2 << 4) + M): \
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