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@@ -6890,15 +6890,18 @@ static void gen6_enable_rps(struct drm_i915_private *dev_priv)
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static void gen6_update_ring_freq(struct drm_i915_private *dev_priv)
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{
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struct intel_rps *rps = &dev_priv->gt_pm.rps;
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- int min_freq = 15;
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+ const int min_freq = 15;
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+ const int scaling_factor = 180;
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unsigned int gpu_freq;
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unsigned int max_ia_freq, min_ring_freq;
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unsigned int max_gpu_freq, min_gpu_freq;
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- int scaling_factor = 180;
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struct cpufreq_policy *policy;
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WARN_ON(!mutex_is_locked(&dev_priv->pcu_lock));
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+ if (rps->max_freq <= rps->min_freq)
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+ return;
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+
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policy = cpufreq_cpu_get(0);
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if (policy) {
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max_ia_freq = policy->cpuinfo.max_freq;
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@@ -6932,7 +6935,7 @@ static void gen6_update_ring_freq(struct drm_i915_private *dev_priv)
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* the PCU should use as a reference to determine the ring frequency.
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*/
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for (gpu_freq = max_gpu_freq; gpu_freq >= min_gpu_freq; gpu_freq--) {
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- int diff = max_gpu_freq - gpu_freq;
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+ const int diff = max_gpu_freq - gpu_freq;
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unsigned int ia_freq = 0, ring_freq = 0;
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if (IS_GEN9_BC(dev_priv) || IS_CANNONLAKE(dev_priv)) {
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