|
@@ -80,16 +80,12 @@ static long rockchip_ddrclk_sip_round_rate(struct clk_hw *hw,
|
|
|
static u8 rockchip_ddrclk_get_parent(struct clk_hw *hw)
|
|
|
{
|
|
|
struct rockchip_ddrclk *ddrclk = to_rockchip_ddrclk_hw(hw);
|
|
|
- int num_parents = clk_hw_get_num_parents(hw);
|
|
|
u32 val;
|
|
|
|
|
|
val = clk_readl(ddrclk->reg_base +
|
|
|
ddrclk->mux_offset) >> ddrclk->mux_shift;
|
|
|
val &= GENMASK(ddrclk->mux_width - 1, 0);
|
|
|
|
|
|
- if (val >= num_parents)
|
|
|
- return -EINVAL;
|
|
|
-
|
|
|
return val;
|
|
|
}
|
|
|
|