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@@ -32,14 +32,13 @@
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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+#include <linux/mfd/syscon.h>
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+#include <linux/regmap.h>
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#include <linux/can/dev.h>
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#include "c_can.h"
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-#define CAN_RAMINIT_START_MASK(i) (0x001 << (i))
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-#define CAN_RAMINIT_DONE_MASK(i) (0x100 << (i))
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-#define CAN_RAMINIT_ALL_MASK(i) (0x101 << (i))
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#define DCAN_RAM_INIT_BIT (1 << 3)
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static DEFINE_SPINLOCK(raminit_lock);
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/*
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@@ -72,39 +71,63 @@ static void c_can_plat_write_reg_aligned_to_32bit(const struct c_can_priv *priv,
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writew(val, priv->base + 2 * priv->regs[index]);
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}
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-static void c_can_hw_raminit_wait_ti(const struct c_can_priv *priv, u32 mask,
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- u32 val)
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+static void c_can_hw_raminit_wait_syscon(const struct c_can_priv *priv,
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+ u32 mask, u32 val)
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{
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+ const struct c_can_raminit *raminit = &priv->raminit_sys;
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+ int timeout = 0;
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+ u32 ctrl = 0;
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+
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/* We look only at the bits of our instance. */
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val &= mask;
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- while ((readl(priv->raminit_ctrlreg) & mask) != val)
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+ do {
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udelay(1);
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+ timeout++;
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+
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+ regmap_read(raminit->syscon, raminit->reg, &ctrl);
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+ if (timeout == 1000) {
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+ dev_err(&priv->dev->dev, "%s: time out\n", __func__);
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+ break;
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+ }
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+ } while ((ctrl & mask) != val);
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}
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-static void c_can_hw_raminit_ti(const struct c_can_priv *priv, bool enable)
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+static void c_can_hw_raminit_syscon(const struct c_can_priv *priv, bool enable)
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{
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- u32 mask = CAN_RAMINIT_ALL_MASK(priv->instance);
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- u32 ctrl;
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+ const struct c_can_raminit *raminit = &priv->raminit_sys;
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+ u32 ctrl = 0;
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+ u32 mask;
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spin_lock(&raminit_lock);
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- ctrl = readl(priv->raminit_ctrlreg);
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+ mask = 1 << raminit->bits.start | 1 << raminit->bits.done;
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+ regmap_read(raminit->syscon, raminit->reg, &ctrl);
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+
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/* We clear the done and start bit first. The start bit is
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* looking at the 0 -> transition, but is not self clearing;
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* And we clear the init done bit as well.
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+ * NOTE: DONE must be written with 1 to clear it.
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*/
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- ctrl &= ~CAN_RAMINIT_START_MASK(priv->instance);
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- ctrl |= CAN_RAMINIT_DONE_MASK(priv->instance);
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- writel(ctrl, priv->raminit_ctrlreg);
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- ctrl &= ~CAN_RAMINIT_DONE_MASK(priv->instance);
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- c_can_hw_raminit_wait_ti(priv, mask, ctrl);
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+ ctrl &= ~(1 << raminit->bits.start);
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+ ctrl |= 1 << raminit->bits.done;
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+ regmap_write(raminit->syscon, raminit->reg, ctrl);
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+
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+ ctrl &= ~(1 << raminit->bits.done);
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+ c_can_hw_raminit_wait_syscon(priv, mask, ctrl);
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if (enable) {
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/* Set start bit and wait for the done bit. */
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- ctrl |= CAN_RAMINIT_START_MASK(priv->instance);
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- writel(ctrl, priv->raminit_ctrlreg);
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- ctrl |= CAN_RAMINIT_DONE_MASK(priv->instance);
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- c_can_hw_raminit_wait_ti(priv, mask, ctrl);
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+ ctrl |= 1 << raminit->bits.start;
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+ regmap_write(raminit->syscon, raminit->reg, ctrl);
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+
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+ /* clear START bit if start pulse is needed */
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+ if (raminit->needs_pulse) {
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+ ctrl &= ~(1 << raminit->bits.start);
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+ regmap_write(raminit->syscon, raminit->reg, ctrl);
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+ }
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+
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+ ctrl |= 1 << raminit->bits.done;
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+ c_can_hw_raminit_wait_syscon(priv, mask, ctrl);
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}
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spin_unlock(&raminit_lock);
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}
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@@ -159,26 +182,60 @@ static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)
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}
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}
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+static const struct c_can_driver_data c_can_drvdata = {
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+ .id = BOSCH_C_CAN,
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+};
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+
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+static const struct c_can_driver_data d_can_drvdata = {
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+ .id = BOSCH_D_CAN,
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+};
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+
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+static const struct raminit_bits dra7_raminit_bits[] = {
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+ [0] = { .start = 3, .done = 1, },
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+ [1] = { .start = 5, .done = 2, },
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+};
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+
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+static const struct c_can_driver_data dra7_dcan_drvdata = {
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+ .id = BOSCH_D_CAN,
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+ .raminit_num = ARRAY_SIZE(dra7_raminit_bits),
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+ .raminit_bits = dra7_raminit_bits,
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+ .raminit_pulse = true,
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+};
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+
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+static const struct raminit_bits am3352_raminit_bits[] = {
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+ [0] = { .start = 0, .done = 8, },
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+ [1] = { .start = 1, .done = 9, },
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+};
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+
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+static const struct c_can_driver_data am3352_dcan_drvdata = {
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+ .id = BOSCH_D_CAN,
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+ .raminit_num = ARRAY_SIZE(am3352_raminit_bits),
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+ .raminit_bits = am3352_raminit_bits,
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+};
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+
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static struct platform_device_id c_can_id_table[] = {
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- [BOSCH_C_CAN_PLATFORM] = {
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+ {
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.name = KBUILD_MODNAME,
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- .driver_data = BOSCH_C_CAN,
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+ .driver_data = (kernel_ulong_t)&c_can_drvdata,
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},
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- [BOSCH_C_CAN] = {
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+ {
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.name = "c_can",
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- .driver_data = BOSCH_C_CAN,
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+ .driver_data = (kernel_ulong_t)&c_can_drvdata,
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},
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- [BOSCH_D_CAN] = {
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+ {
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.name = "d_can",
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- .driver_data = BOSCH_D_CAN,
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- }, {
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- }
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+ .driver_data = (kernel_ulong_t)&d_can_drvdata,
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+ },
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+ { /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(platform, c_can_id_table);
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static const struct of_device_id c_can_of_table[] = {
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- { .compatible = "bosch,c_can", .data = &c_can_id_table[BOSCH_C_CAN] },
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- { .compatible = "bosch,d_can", .data = &c_can_id_table[BOSCH_D_CAN] },
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+ { .compatible = "bosch,c_can", .data = &c_can_drvdata },
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+ { .compatible = "bosch,d_can", .data = &d_can_drvdata },
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+ { .compatible = "ti,dra7-d_can", .data = &dra7_dcan_drvdata },
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+ { .compatible = "ti,am3352-d_can", .data = &am3352_dcan_drvdata },
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+ { .compatible = "ti,am4372-d_can", .data = &am3352_dcan_drvdata },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, c_can_of_table);
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@@ -190,21 +247,20 @@ static int c_can_plat_probe(struct platform_device *pdev)
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struct net_device *dev;
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struct c_can_priv *priv;
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const struct of_device_id *match;
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- const struct platform_device_id *id;
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- struct resource *mem, *res;
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+ struct resource *mem;
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int irq;
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struct clk *clk;
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-
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- if (pdev->dev.of_node) {
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- match = of_match_device(c_can_of_table, &pdev->dev);
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- if (!match) {
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- dev_err(&pdev->dev, "Failed to find matching dt id\n");
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- ret = -EINVAL;
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- goto exit;
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- }
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- id = match->data;
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+ const struct c_can_driver_data *drvdata;
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+ struct device_node *np = pdev->dev.of_node;
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+
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+ match = of_match_device(c_can_of_table, &pdev->dev);
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+ if (match) {
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+ drvdata = match->data;
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+ } else if (pdev->id_entry->driver_data) {
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+ drvdata = (struct c_can_driver_data *)
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+ platform_get_device_id(pdev)->driver_data;
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} else {
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- id = platform_get_device_id(pdev);
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+ return -ENODEV;
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}
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/* get the appropriate clk */
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@@ -236,7 +292,7 @@ static int c_can_plat_probe(struct platform_device *pdev)
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}
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priv = netdev_priv(dev);
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- switch (id->driver_data) {
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+ switch (drvdata->id) {
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case BOSCH_C_CAN:
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priv->regs = reg_map_c_can;
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switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) {
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@@ -263,27 +319,50 @@ static int c_can_plat_probe(struct platform_device *pdev)
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priv->read_reg32 = d_can_plat_read_reg32;
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priv->write_reg32 = d_can_plat_write_reg32;
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- if (pdev->dev.of_node)
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- priv->instance = of_alias_get_id(pdev->dev.of_node, "d_can");
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- else
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- priv->instance = pdev->id;
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-
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- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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- /* Not all D_CAN modules have a separate register for the D_CAN
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- * RAM initialization. Use default RAM init bit in D_CAN module
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- * if not specified in DT.
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+ /* Check if we need custom RAMINIT via syscon. Mostly for TI
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+ * platforms. Only supported with DT boot.
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*/
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- if (!res) {
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+ if (np && of_property_read_bool(np, "syscon-raminit")) {
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+ u32 id;
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+ struct c_can_raminit *raminit = &priv->raminit_sys;
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+
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+ ret = -EINVAL;
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+ raminit->syscon = syscon_regmap_lookup_by_phandle(np,
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+ "syscon-raminit");
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+ if (IS_ERR(raminit->syscon)) {
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+ /* can fail with -EPROBE_DEFER */
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+ ret = PTR_ERR(raminit->syscon);
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+ free_c_can_dev(dev);
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+ return ret;
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+ }
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+
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+ if (of_property_read_u32_index(np, "syscon-raminit", 1,
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+ &raminit->reg)) {
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+ dev_err(&pdev->dev,
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+ "couldn't get the RAMINIT reg. offset!\n");
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+ goto exit_free_device;
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+ }
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+
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+ if (of_property_read_u32_index(np, "syscon-raminit", 2,
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+ &id)) {
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+ dev_err(&pdev->dev,
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+ "couldn't get the CAN instance ID\n");
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+ goto exit_free_device;
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+ }
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+
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+ if (id >= drvdata->raminit_num) {
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+ dev_err(&pdev->dev,
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+ "Invalid CAN instance ID\n");
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+ goto exit_free_device;
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+ }
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+
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+ raminit->bits = drvdata->raminit_bits[id];
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+ raminit->needs_pulse = drvdata->raminit_pulse;
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+
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+ priv->raminit = c_can_hw_raminit_syscon;
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+ } else {
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priv->raminit = c_can_hw_raminit;
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- break;
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}
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-
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- priv->raminit_ctrlreg = devm_ioremap(&pdev->dev, res->start,
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- resource_size(res));
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- if (!priv->raminit_ctrlreg || priv->instance < 0)
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- dev_info(&pdev->dev, "control memory is not used for raminit\n");
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- else
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- priv->raminit = c_can_hw_raminit_ti;
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break;
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default:
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ret = -EINVAL;
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@@ -295,7 +374,7 @@ static int c_can_plat_probe(struct platform_device *pdev)
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priv->device = &pdev->dev;
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priv->can.clock.freq = clk_get_rate(clk);
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priv->priv = clk;
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- priv->type = id->driver_data;
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+ priv->type = drvdata->id;
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platform_set_drvdata(pdev, dev);
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SET_NETDEV_DEV(dev, &pdev->dev);
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