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@@ -4522,32 +4522,6 @@ static int smu7_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type
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return 0;
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}
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-static int smu7_request_firmware(struct pp_hwmgr *hwmgr)
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-{
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- int ret;
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- struct cgs_firmware_info info = {0};
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-
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- ret = cgs_get_firmware_info(hwmgr->device,
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- smu7_convert_fw_type_to_cgs(UCODE_ID_SMU),
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- &info);
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- if (ret || !info.kptr)
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- return -EINVAL;
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-
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- return 0;
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-}
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-
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-static int smu7_release_firmware(struct pp_hwmgr *hwmgr)
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-{
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- int ret;
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-
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- ret = cgs_rel_firmware(hwmgr->device,
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- smu7_convert_fw_type_to_cgs(UCODE_ID_SMU));
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- if (ret)
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- return -EINVAL;
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-
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- return 0;
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-}
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-
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static void smu7_find_min_clock_masks(struct pp_hwmgr *hwmgr,
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uint32_t *sclk_mask, uint32_t *mclk_mask,
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uint32_t min_sclk, uint32_t min_mclk)
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@@ -4691,8 +4665,6 @@ static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
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.get_clock_by_type = smu7_get_clock_by_type,
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.read_sensor = smu7_read_sensor,
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.dynamic_state_management_disable = smu7_disable_dpm_tasks,
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- .request_firmware = smu7_request_firmware,
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- .release_firmware = smu7_release_firmware,
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.set_power_profile_state = smu7_set_power_profile_state,
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.avfs_control = smu7_avfs_control,
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.disable_smc_firmware_ctf = smu7_thermal_disable_alert,
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