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@@ -257,6 +257,19 @@
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enable-offset = <0x0>;
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enable-mask = <0x39>;
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};
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+
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+ rtcclk: rtcclk@17000000 {
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+ compatible = "apm,xgene-device-clock";
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+ #clock-cells = <1>;
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+ clocks = <&socplldiv2 0>;
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+ reg = <0x0 0x17000000 0x0 0x2000>;
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+ reg-names = "csr-reg";
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+ csr-offset = <0xc>;
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+ csr-mask = <0x2>;
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+ enable-offset = <0x10>;
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+ enable-mask = <0x2>;
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+ clock-output-names = "rtcclk";
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+ };
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};
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serial0: serial@1c020000 {
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@@ -342,5 +355,13 @@
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phys = <&phy3 0>;
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phy-names = "sata-phy";
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};
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+
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+ rtc: rtc@10510000 {
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+ compatible = "apm,xgene-rtc";
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+ reg = <0x0 0x10510000 0x0 0x400>;
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+ interrupts = <0x0 0x46 0x4>;
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+ #clock-cells = <1>;
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+ clocks = <&rtcclk 0>;
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+ };
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};
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};
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