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@@ -50,70 +50,77 @@
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#define BATCH_OFFSET_BIAS (256*1024)
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-struct i915_execbuffer_params {
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- struct drm_device *dev;
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- struct drm_file *file;
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- struct i915_vma *batch;
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- u32 dispatch_flags;
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- u32 args_batch_start_offset;
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- struct intel_engine_cs *engine;
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- struct i915_gem_context *ctx;
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- struct drm_i915_gem_request *request;
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-};
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+#define __I915_EXEC_ILLEGAL_FLAGS \
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+ (__I915_EXEC_UNKNOWN_FLAGS | I915_EXEC_CONSTANTS_MASK)
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-struct eb_vmas {
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+struct i915_execbuffer {
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struct drm_i915_private *i915;
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+ struct drm_file *file;
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+ struct drm_i915_gem_execbuffer2 *args;
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+ struct drm_i915_gem_exec_object2 *exec;
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+ struct intel_engine_cs *engine;
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+ struct i915_gem_context *ctx;
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+ struct i915_address_space *vm;
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+ struct i915_vma *batch;
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+ struct drm_i915_gem_request *request;
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+ u32 batch_start_offset;
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+ u32 batch_len;
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+ unsigned int dispatch_flags;
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+ struct drm_i915_gem_exec_object2 shadow_exec_entry;
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+ bool need_relocs;
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struct list_head vmas;
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+ struct reloc_cache {
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+ struct drm_mm_node node;
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+ unsigned long vaddr;
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+ unsigned int page;
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+ bool use_64bit_reloc : 1;
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+ } reloc_cache;
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int and;
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union {
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- struct i915_vma *lut[0];
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- struct hlist_head buckets[0];
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+ struct i915_vma **lut;
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+ struct hlist_head *buckets;
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};
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};
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-static struct eb_vmas *
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-eb_create(struct drm_i915_private *i915,
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- struct drm_i915_gem_execbuffer2 *args)
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+static int eb_create(struct i915_execbuffer *eb)
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{
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- struct eb_vmas *eb = NULL;
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-
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- if (args->flags & I915_EXEC_HANDLE_LUT) {
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- unsigned size = args->buffer_count;
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+ eb->lut = NULL;
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+ if (eb->args->flags & I915_EXEC_HANDLE_LUT) {
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+ unsigned int size = eb->args->buffer_count;
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size *= sizeof(struct i915_vma *);
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- size += sizeof(struct eb_vmas);
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- eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
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+ eb->lut = kmalloc(size,
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+ GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
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}
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- if (eb == NULL) {
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- unsigned size = args->buffer_count;
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- unsigned count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
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+ if (!eb->lut) {
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+ unsigned int size = eb->args->buffer_count;
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+ unsigned int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
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BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
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while (count > 2*size)
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count >>= 1;
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- eb = kzalloc(count*sizeof(struct hlist_head) +
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- sizeof(struct eb_vmas),
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- GFP_TEMPORARY);
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- if (eb == NULL)
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- return eb;
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+ eb->lut = kzalloc(count * sizeof(struct hlist_head),
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+ GFP_TEMPORARY);
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+ if (!eb->lut)
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+ return -ENOMEM;
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eb->and = count - 1;
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- } else
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- eb->and = -args->buffer_count;
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+ } else {
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+ eb->and = -eb->args->buffer_count;
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+ }
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- eb->i915 = i915;
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INIT_LIST_HEAD(&eb->vmas);
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- return eb;
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+ return 0;
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}
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static void
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-eb_reset(struct eb_vmas *eb)
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+eb_reset(struct i915_execbuffer *eb)
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{
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if (eb->and >= 0)
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memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
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}
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static struct i915_vma *
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-eb_get_batch(struct eb_vmas *eb)
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+eb_get_batch(struct i915_execbuffer *eb)
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{
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struct i915_vma *vma = list_entry(eb->vmas.prev, typeof(*vma), exec_list);
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@@ -133,34 +140,30 @@ eb_get_batch(struct eb_vmas *eb)
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}
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static int
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-eb_lookup_vmas(struct eb_vmas *eb,
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- struct drm_i915_gem_exec_object2 *exec,
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- const struct drm_i915_gem_execbuffer2 *args,
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- struct i915_address_space *vm,
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- struct drm_file *file)
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+eb_lookup_vmas(struct i915_execbuffer *eb)
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{
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struct drm_i915_gem_object *obj;
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struct list_head objects;
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int i, ret;
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INIT_LIST_HEAD(&objects);
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- spin_lock(&file->table_lock);
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+ spin_lock(&eb->file->table_lock);
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/* Grab a reference to the object and release the lock so we can lookup
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* or create the VMA without using GFP_ATOMIC */
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- for (i = 0; i < args->buffer_count; i++) {
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- obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
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+ for (i = 0; i < eb->args->buffer_count; i++) {
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+ obj = to_intel_bo(idr_find(&eb->file->object_idr, eb->exec[i].handle));
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if (obj == NULL) {
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- spin_unlock(&file->table_lock);
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+ spin_unlock(&eb->file->table_lock);
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DRM_DEBUG("Invalid object handle %d at index %d\n",
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- exec[i].handle, i);
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+ eb->exec[i].handle, i);
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ret = -ENOENT;
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goto err;
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}
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if (!list_empty(&obj->obj_exec_link)) {
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- spin_unlock(&file->table_lock);
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+ spin_unlock(&eb->file->table_lock);
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DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
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- obj, exec[i].handle, i);
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+ obj, eb->exec[i].handle, i);
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ret = -EINVAL;
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goto err;
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}
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@@ -168,7 +171,7 @@ eb_lookup_vmas(struct eb_vmas *eb,
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i915_gem_object_get(obj);
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list_add_tail(&obj->obj_exec_link, &objects);
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}
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- spin_unlock(&file->table_lock);
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+ spin_unlock(&eb->file->table_lock);
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i = 0;
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while (!list_empty(&objects)) {
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@@ -186,7 +189,7 @@ eb_lookup_vmas(struct eb_vmas *eb,
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* from the (obj, vm) we don't run the risk of creating
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* duplicated vmas for the same vm.
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*/
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- vma = i915_vma_instance(obj, vm, NULL);
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+ vma = i915_vma_instance(obj, eb->vm, NULL);
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if (unlikely(IS_ERR(vma))) {
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DRM_DEBUG("Failed to lookup VMA\n");
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ret = PTR_ERR(vma);
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@@ -197,11 +200,13 @@ eb_lookup_vmas(struct eb_vmas *eb,
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list_add_tail(&vma->exec_list, &eb->vmas);
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list_del_init(&obj->obj_exec_link);
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- vma->exec_entry = &exec[i];
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+ vma->exec_entry = &eb->exec[i];
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if (eb->and < 0) {
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eb->lut[i] = vma;
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} else {
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- uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
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+ u32 handle =
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+ eb->args->flags & I915_EXEC_HANDLE_LUT ?
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+ i : eb->exec[i].handle;
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vma->exec_handle = handle;
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hlist_add_head(&vma->exec_node,
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&eb->buckets[handle & eb->and]);
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@@ -228,7 +233,7 @@ err:
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return ret;
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}
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-static struct i915_vma *eb_get_vma(struct eb_vmas *eb, unsigned long handle)
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+static struct i915_vma *eb_get_vma(struct i915_execbuffer *eb, unsigned long handle)
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{
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if (eb->and < 0) {
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if (handle >= -eb->and)
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@@ -248,7 +253,7 @@ static struct i915_vma *eb_get_vma(struct eb_vmas *eb, unsigned long handle)
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}
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static void
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-i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
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+eb_unreserve_vma(struct i915_vma *vma)
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{
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struct drm_i915_gem_exec_object2 *entry;
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@@ -266,8 +271,10 @@ i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
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entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
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}
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-static void eb_destroy(struct eb_vmas *eb)
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+static void eb_destroy(struct i915_execbuffer *eb)
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{
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+ i915_gem_context_put(eb->ctx);
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+
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while (!list_empty(&eb->vmas)) {
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struct i915_vma *vma;
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@@ -275,11 +282,10 @@ static void eb_destroy(struct eb_vmas *eb)
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struct i915_vma,
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exec_list);
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list_del_init(&vma->exec_list);
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- i915_gem_execbuffer_unreserve_vma(vma);
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+ eb_unreserve_vma(vma);
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vma->exec_entry = NULL;
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i915_vma_put(vma);
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}
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- kfree(eb);
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}
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static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
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@@ -320,20 +326,11 @@ relocation_target(const struct drm_i915_gem_relocation_entry *reloc,
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return gen8_canonical_addr((int)reloc->delta + target_offset);
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}
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-struct reloc_cache {
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- struct drm_i915_private *i915;
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- struct drm_mm_node node;
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- unsigned long vaddr;
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- unsigned int page;
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- bool use_64bit_reloc;
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-};
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-
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static void reloc_cache_init(struct reloc_cache *cache,
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struct drm_i915_private *i915)
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{
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cache->page = -1;
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cache->vaddr = 0;
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- cache->i915 = i915;
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/* Must be a variable in the struct to allow GCC to unroll. */
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cache->use_64bit_reloc = HAS_64BIT_RELOC(i915);
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cache->node.allocated = false;
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@@ -351,7 +348,14 @@ static inline unsigned int unmask_flags(unsigned long p)
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#define KMAP 0x4 /* after CLFLUSH_FLAGS */
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-static void reloc_cache_fini(struct reloc_cache *cache)
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+static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache)
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+{
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+ struct drm_i915_private *i915 =
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+ container_of(cache, struct i915_execbuffer, reloc_cache)->i915;
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+ return &i915->ggtt;
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+}
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+
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+static void reloc_cache_reset(struct reloc_cache *cache)
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{
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void *vaddr;
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@@ -369,7 +373,7 @@ static void reloc_cache_fini(struct reloc_cache *cache)
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wmb();
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io_mapping_unmap_atomic((void __iomem *)vaddr);
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if (cache->node.allocated) {
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- struct i915_ggtt *ggtt = &cache->i915->ggtt;
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+ struct i915_ggtt *ggtt = cache_to_ggtt(cache);
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ggtt->base.clear_range(&ggtt->base,
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cache->node.start,
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@@ -379,6 +383,9 @@ static void reloc_cache_fini(struct reloc_cache *cache)
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i915_vma_unpin((struct i915_vma *)cache->node.mm);
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}
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}
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+
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+ cache->vaddr = 0;
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+ cache->page = -1;
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}
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static void *reloc_kmap(struct drm_i915_gem_object *obj,
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@@ -417,7 +424,7 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj,
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struct reloc_cache *cache,
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int page)
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{
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- struct i915_ggtt *ggtt = &cache->i915->ggtt;
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+ struct i915_ggtt *ggtt = cache_to_ggtt(cache);
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unsigned long offset;
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void *vaddr;
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@@ -467,7 +474,8 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj,
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offset += page << PAGE_SHIFT;
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}
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- vaddr = (void __force *) io_mapping_map_atomic_wc(&cache->i915->ggtt.mappable, offset);
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+ vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->mappable,
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+ offset);
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cache->page = page;
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cache->vaddr = (unsigned long)vaddr;
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@@ -546,12 +554,10 @@ repeat:
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}
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static int
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-i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
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- struct eb_vmas *eb,
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- struct drm_i915_gem_relocation_entry *reloc,
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- struct reloc_cache *cache)
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+eb_relocate_entry(struct drm_i915_gem_object *obj,
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+ struct i915_execbuffer *eb,
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+ struct drm_i915_gem_relocation_entry *reloc)
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{
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- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
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struct drm_gem_object *target_obj;
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struct drm_i915_gem_object *target_i915_obj;
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struct i915_vma *target_vma;
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@@ -570,8 +576,8 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
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/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
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* pipe_control writes because the gpu doesn't properly redirect them
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* through the ppgtt for non_secure batchbuffers. */
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- if (unlikely(IS_GEN6(dev_priv) &&
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- reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION)) {
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+ if (unlikely(IS_GEN6(eb->i915) &&
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+ reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION)) {
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ret = i915_vma_bind(target_vma, target_i915_obj->cache_level,
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PIN_GLOBAL);
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if (WARN_ONCE(ret, "Unexpected failure to bind target VMA!"))
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@@ -612,7 +618,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
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/* Check that the relocation address is valid... */
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if (unlikely(reloc->offset >
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- obj->base.size - (cache->use_64bit_reloc ? 8 : 4))) {
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+ obj->base.size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) {
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DRM_DEBUG("Relocation beyond object bounds: "
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"obj %p target %d offset %d size %d.\n",
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obj, reloc->target_handle,
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@@ -628,7 +634,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
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return -EINVAL;
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}
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- ret = relocate_entry(obj, reloc, cache, target_offset);
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+ ret = relocate_entry(obj, reloc, &eb->reloc_cache, target_offset);
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if (ret)
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return ret;
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@@ -637,19 +643,15 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
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return 0;
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}
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-static int
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-i915_gem_execbuffer_relocate_vma(struct i915_vma *vma,
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- struct eb_vmas *eb)
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+static int eb_relocate_vma(struct i915_vma *vma, struct i915_execbuffer *eb)
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{
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#define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
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struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)];
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struct drm_i915_gem_relocation_entry __user *user_relocs;
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struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
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- struct reloc_cache cache;
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int remain, ret = 0;
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user_relocs = u64_to_user_ptr(entry->relocs_ptr);
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- reloc_cache_init(&cache, eb->i915);
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remain = entry->relocation_count;
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while (remain) {
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@@ -678,7 +680,7 @@ i915_gem_execbuffer_relocate_vma(struct i915_vma *vma,
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do {
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u64 offset = r->presumed_offset;
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- ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, r, &cache);
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|
|
+ ret = eb_relocate_entry(vma->obj, eb, r);
|
|
|
if (ret)
|
|
|
goto out;
|
|
|
|
|
@@ -710,39 +712,35 @@ i915_gem_execbuffer_relocate_vma(struct i915_vma *vma,
|
|
|
}
|
|
|
|
|
|
out:
|
|
|
- reloc_cache_fini(&cache);
|
|
|
+ reloc_cache_reset(&eb->reloc_cache);
|
|
|
return ret;
|
|
|
#undef N_RELOC
|
|
|
}
|
|
|
|
|
|
static int
|
|
|
-i915_gem_execbuffer_relocate_vma_slow(struct i915_vma *vma,
|
|
|
- struct eb_vmas *eb,
|
|
|
- struct drm_i915_gem_relocation_entry *relocs)
|
|
|
+eb_relocate_vma_slow(struct i915_vma *vma,
|
|
|
+ struct i915_execbuffer *eb,
|
|
|
+ struct drm_i915_gem_relocation_entry *relocs)
|
|
|
{
|
|
|
const struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
|
|
|
- struct reloc_cache cache;
|
|
|
int i, ret = 0;
|
|
|
|
|
|
- reloc_cache_init(&cache, eb->i915);
|
|
|
for (i = 0; i < entry->relocation_count; i++) {
|
|
|
- ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, &relocs[i], &cache);
|
|
|
+ ret = eb_relocate_entry(vma->obj, eb, &relocs[i]);
|
|
|
if (ret)
|
|
|
break;
|
|
|
}
|
|
|
- reloc_cache_fini(&cache);
|
|
|
-
|
|
|
+ reloc_cache_reset(&eb->reloc_cache);
|
|
|
return ret;
|
|
|
}
|
|
|
|
|
|
-static int
|
|
|
-i915_gem_execbuffer_relocate(struct eb_vmas *eb)
|
|
|
+static int eb_relocate(struct i915_execbuffer *eb)
|
|
|
{
|
|
|
struct i915_vma *vma;
|
|
|
int ret = 0;
|
|
|
|
|
|
list_for_each_entry(vma, &eb->vmas, exec_list) {
|
|
|
- ret = i915_gem_execbuffer_relocate_vma(vma, eb);
|
|
|
+ ret = eb_relocate_vma(vma, eb);
|
|
|
if (ret)
|
|
|
break;
|
|
|
}
|
|
@@ -757,9 +755,9 @@ static bool only_mappable_for_reloc(unsigned int flags)
|
|
|
}
|
|
|
|
|
|
static int
|
|
|
-i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
|
|
|
- struct intel_engine_cs *engine,
|
|
|
- bool *need_reloc)
|
|
|
+eb_reserve_vma(struct i915_vma *vma,
|
|
|
+ struct intel_engine_cs *engine,
|
|
|
+ bool *need_reloc)
|
|
|
{
|
|
|
struct drm_i915_gem_object *obj = vma->obj;
|
|
|
struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
|
|
@@ -878,34 +876,27 @@ eb_vma_misplaced(struct i915_vma *vma)
|
|
|
return false;
|
|
|
}
|
|
|
|
|
|
-static int
|
|
|
-i915_gem_execbuffer_reserve(struct intel_engine_cs *engine,
|
|
|
- struct list_head *vmas,
|
|
|
- struct i915_gem_context *ctx,
|
|
|
- bool *need_relocs)
|
|
|
+static int eb_reserve(struct i915_execbuffer *eb)
|
|
|
{
|
|
|
+ const bool has_fenced_gpu_access = INTEL_GEN(eb->i915) < 4;
|
|
|
+ const bool needs_unfenced_map = INTEL_INFO(eb->i915)->unfenced_needs_alignment;
|
|
|
struct drm_i915_gem_object *obj;
|
|
|
struct i915_vma *vma;
|
|
|
- struct i915_address_space *vm;
|
|
|
struct list_head ordered_vmas;
|
|
|
struct list_head pinned_vmas;
|
|
|
- bool has_fenced_gpu_access = INTEL_GEN(engine->i915) < 4;
|
|
|
- bool needs_unfenced_map = INTEL_INFO(engine->i915)->unfenced_needs_alignment;
|
|
|
int retry;
|
|
|
|
|
|
- vm = list_first_entry(vmas, struct i915_vma, exec_list)->vm;
|
|
|
-
|
|
|
INIT_LIST_HEAD(&ordered_vmas);
|
|
|
INIT_LIST_HEAD(&pinned_vmas);
|
|
|
- while (!list_empty(vmas)) {
|
|
|
+ while (!list_empty(&eb->vmas)) {
|
|
|
struct drm_i915_gem_exec_object2 *entry;
|
|
|
bool need_fence, need_mappable;
|
|
|
|
|
|
- vma = list_first_entry(vmas, struct i915_vma, exec_list);
|
|
|
+ vma = list_first_entry(&eb->vmas, struct i915_vma, exec_list);
|
|
|
obj = vma->obj;
|
|
|
entry = vma->exec_entry;
|
|
|
|
|
|
- if (ctx->flags & CONTEXT_NO_ZEROMAP)
|
|
|
+ if (eb->ctx->flags & CONTEXT_NO_ZEROMAP)
|
|
|
entry->flags |= __EXEC_OBJECT_NEEDS_BIAS;
|
|
|
|
|
|
if (!has_fenced_gpu_access)
|
|
@@ -927,8 +918,8 @@ i915_gem_execbuffer_reserve(struct intel_engine_cs *engine,
|
|
|
obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
|
|
|
obj->base.pending_write_domain = 0;
|
|
|
}
|
|
|
- list_splice(&ordered_vmas, vmas);
|
|
|
- list_splice(&pinned_vmas, vmas);
|
|
|
+ list_splice(&ordered_vmas, &eb->vmas);
|
|
|
+ list_splice(&pinned_vmas, &eb->vmas);
|
|
|
|
|
|
/* Attempt to pin all of the buffers into the GTT.
|
|
|
* This is done in 3 phases:
|
|
@@ -947,27 +938,24 @@ i915_gem_execbuffer_reserve(struct intel_engine_cs *engine,
|
|
|
int ret = 0;
|
|
|
|
|
|
/* Unbind any ill-fitting objects or pin. */
|
|
|
- list_for_each_entry(vma, vmas, exec_list) {
|
|
|
+ list_for_each_entry(vma, &eb->vmas, exec_list) {
|
|
|
if (!drm_mm_node_allocated(&vma->node))
|
|
|
continue;
|
|
|
|
|
|
if (eb_vma_misplaced(vma))
|
|
|
ret = i915_vma_unbind(vma);
|
|
|
else
|
|
|
- ret = i915_gem_execbuffer_reserve_vma(vma,
|
|
|
- engine,
|
|
|
- need_relocs);
|
|
|
+ ret = eb_reserve_vma(vma, eb->engine, &eb->need_relocs);
|
|
|
if (ret)
|
|
|
goto err;
|
|
|
}
|
|
|
|
|
|
/* Bind fresh objects */
|
|
|
- list_for_each_entry(vma, vmas, exec_list) {
|
|
|
+ list_for_each_entry(vma, &eb->vmas, exec_list) {
|
|
|
if (drm_mm_node_allocated(&vma->node))
|
|
|
continue;
|
|
|
|
|
|
- ret = i915_gem_execbuffer_reserve_vma(vma, engine,
|
|
|
- need_relocs);
|
|
|
+ ret = eb_reserve_vma(vma, eb->engine, &eb->need_relocs);
|
|
|
if (ret)
|
|
|
goto err;
|
|
|
}
|
|
@@ -977,39 +965,30 @@ err:
|
|
|
return ret;
|
|
|
|
|
|
/* Decrement pin count for bound objects */
|
|
|
- list_for_each_entry(vma, vmas, exec_list)
|
|
|
- i915_gem_execbuffer_unreserve_vma(vma);
|
|
|
+ list_for_each_entry(vma, &eb->vmas, exec_list)
|
|
|
+ eb_unreserve_vma(vma);
|
|
|
|
|
|
- ret = i915_gem_evict_vm(vm, true);
|
|
|
+ ret = i915_gem_evict_vm(eb->vm, true);
|
|
|
if (ret)
|
|
|
return ret;
|
|
|
} while (1);
|
|
|
}
|
|
|
|
|
|
static int
|
|
|
-i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
|
|
|
- struct drm_i915_gem_execbuffer2 *args,
|
|
|
- struct drm_file *file,
|
|
|
- struct intel_engine_cs *engine,
|
|
|
- struct eb_vmas *eb,
|
|
|
- struct drm_i915_gem_exec_object2 *exec,
|
|
|
- struct i915_gem_context *ctx)
|
|
|
+eb_relocate_slow(struct i915_execbuffer *eb)
|
|
|
{
|
|
|
+ const unsigned int count = eb->args->buffer_count;
|
|
|
+ struct drm_device *dev = &eb->i915->drm;
|
|
|
struct drm_i915_gem_relocation_entry *reloc;
|
|
|
- struct i915_address_space *vm;
|
|
|
struct i915_vma *vma;
|
|
|
- bool need_relocs;
|
|
|
int *reloc_offset;
|
|
|
int i, total, ret;
|
|
|
- unsigned count = args->buffer_count;
|
|
|
-
|
|
|
- vm = list_first_entry(&eb->vmas, struct i915_vma, exec_list)->vm;
|
|
|
|
|
|
/* We may process another execbuffer during the unlock... */
|
|
|
while (!list_empty(&eb->vmas)) {
|
|
|
vma = list_first_entry(&eb->vmas, struct i915_vma, exec_list);
|
|
|
list_del_init(&vma->exec_list);
|
|
|
- i915_gem_execbuffer_unreserve_vma(vma);
|
|
|
+ eb_unreserve_vma(vma);
|
|
|
i915_vma_put(vma);
|
|
|
}
|
|
|
|
|
@@ -1017,7 +996,7 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
|
|
|
|
|
|
total = 0;
|
|
|
for (i = 0; i < count; i++)
|
|
|
- total += exec[i].relocation_count;
|
|
|
+ total += eb->exec[i].relocation_count;
|
|
|
|
|
|
reloc_offset = kvmalloc_array(count, sizeof(*reloc_offset), GFP_KERNEL);
|
|
|
reloc = kvmalloc_array(total, sizeof(*reloc), GFP_KERNEL);
|
|
@@ -1034,10 +1013,10 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
|
|
|
u64 invalid_offset = (u64)-1;
|
|
|
int j;
|
|
|
|
|
|
- user_relocs = u64_to_user_ptr(exec[i].relocs_ptr);
|
|
|
+ user_relocs = u64_to_user_ptr(eb->exec[i].relocs_ptr);
|
|
|
|
|
|
if (copy_from_user(reloc+total, user_relocs,
|
|
|
- exec[i].relocation_count * sizeof(*reloc))) {
|
|
|
+ eb->exec[i].relocation_count * sizeof(*reloc))) {
|
|
|
ret = -EFAULT;
|
|
|
mutex_lock(&dev->struct_mutex);
|
|
|
goto err;
|
|
@@ -1052,7 +1031,7 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
|
|
|
* happened we would make the mistake of assuming that the
|
|
|
* relocations were valid.
|
|
|
*/
|
|
|
- for (j = 0; j < exec[i].relocation_count; j++) {
|
|
|
+ for (j = 0; j < eb->exec[i].relocation_count; j++) {
|
|
|
if (__copy_to_user(&user_relocs[j].presumed_offset,
|
|
|
&invalid_offset,
|
|
|
sizeof(invalid_offset))) {
|
|
@@ -1063,7 +1042,7 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
|
|
|
}
|
|
|
|
|
|
reloc_offset[i] = total;
|
|
|
- total += exec[i].relocation_count;
|
|
|
+ total += eb->exec[i].relocation_count;
|
|
|
}
|
|
|
|
|
|
ret = i915_mutex_lock_interruptible(dev);
|
|
@@ -1074,20 +1053,18 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
|
|
|
|
|
|
/* reacquire the objects */
|
|
|
eb_reset(eb);
|
|
|
- ret = eb_lookup_vmas(eb, exec, args, vm, file);
|
|
|
+ ret = eb_lookup_vmas(eb);
|
|
|
if (ret)
|
|
|
goto err;
|
|
|
|
|
|
- need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
|
|
|
- ret = i915_gem_execbuffer_reserve(engine, &eb->vmas, ctx,
|
|
|
- &need_relocs);
|
|
|
+ ret = eb_reserve(eb);
|
|
|
if (ret)
|
|
|
goto err;
|
|
|
|
|
|
list_for_each_entry(vma, &eb->vmas, exec_list) {
|
|
|
- int offset = vma->exec_entry - exec;
|
|
|
- ret = i915_gem_execbuffer_relocate_vma_slow(vma, eb,
|
|
|
- reloc + reloc_offset[offset]);
|
|
|
+ int idx = vma->exec_entry - eb->exec;
|
|
|
+
|
|
|
+ ret = eb_relocate_vma_slow(vma, eb, reloc + reloc_offset[idx]);
|
|
|
if (ret)
|
|
|
goto err;
|
|
|
}
|
|
@@ -1105,13 +1082,12 @@ err:
|
|
|
}
|
|
|
|
|
|
static int
|
|
|
-i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
|
|
|
- struct list_head *vmas)
|
|
|
+eb_move_to_gpu(struct i915_execbuffer *eb)
|
|
|
{
|
|
|
struct i915_vma *vma;
|
|
|
int ret;
|
|
|
|
|
|
- list_for_each_entry(vma, vmas, exec_list) {
|
|
|
+ list_for_each_entry(vma, &eb->vmas, exec_list) {
|
|
|
struct drm_i915_gem_object *obj = vma->obj;
|
|
|
|
|
|
if (vma->exec_entry->flags & EXEC_OBJECT_CAPTURE) {
|
|
@@ -1121,9 +1097,9 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
|
|
|
if (unlikely(!capture))
|
|
|
return -ENOMEM;
|
|
|
|
|
|
- capture->next = req->capture_list;
|
|
|
+ capture->next = eb->request->capture_list;
|
|
|
capture->vma = vma;
|
|
|
- req->capture_list = capture;
|
|
|
+ eb->request->capture_list = capture;
|
|
|
}
|
|
|
|
|
|
if (vma->exec_entry->flags & EXEC_OBJECT_ASYNC)
|
|
@@ -1135,22 +1111,22 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
|
|
|
}
|
|
|
|
|
|
ret = i915_gem_request_await_object
|
|
|
- (req, obj, obj->base.pending_write_domain);
|
|
|
+ (eb->request, obj, obj->base.pending_write_domain);
|
|
|
if (ret)
|
|
|
return ret;
|
|
|
}
|
|
|
|
|
|
/* Unconditionally flush any chipset caches (for streaming writes). */
|
|
|
- i915_gem_chipset_flush(req->engine->i915);
|
|
|
+ i915_gem_chipset_flush(eb->i915);
|
|
|
|
|
|
/* Unconditionally invalidate GPU caches and TLBs. */
|
|
|
- return req->engine->emit_flush(req, EMIT_INVALIDATE);
|
|
|
+ return eb->engine->emit_flush(eb->request, EMIT_INVALIDATE);
|
|
|
}
|
|
|
|
|
|
static bool
|
|
|
i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
|
|
|
{
|
|
|
- if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS)
|
|
|
+ if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
|
|
|
return false;
|
|
|
|
|
|
/* Kernel clipping was a DRI1 misfeature */
|
|
@@ -1247,22 +1223,24 @@ validate_exec_list(struct drm_device *dev,
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
-static struct i915_gem_context *
|
|
|
-i915_gem_validate_context(struct drm_device *dev, struct drm_file *file,
|
|
|
- struct intel_engine_cs *engine, const u32 ctx_id)
|
|
|
+static int eb_select_context(struct i915_execbuffer *eb)
|
|
|
{
|
|
|
+ unsigned int ctx_id = i915_execbuffer2_get_context_id(*eb->args);
|
|
|
struct i915_gem_context *ctx;
|
|
|
|
|
|
- ctx = i915_gem_context_lookup(file->driver_priv, ctx_id);
|
|
|
- if (IS_ERR(ctx))
|
|
|
- return ctx;
|
|
|
+ ctx = i915_gem_context_lookup(eb->file->driver_priv, ctx_id);
|
|
|
+ if (unlikely(IS_ERR(ctx)))
|
|
|
+ return PTR_ERR(ctx);
|
|
|
|
|
|
- if (i915_gem_context_is_banned(ctx)) {
|
|
|
+ if (unlikely(i915_gem_context_is_banned(ctx))) {
|
|
|
DRM_DEBUG("Context %u tried to submit while banned\n", ctx_id);
|
|
|
- return ERR_PTR(-EIO);
|
|
|
+ return -EIO;
|
|
|
}
|
|
|
|
|
|
- return ctx;
|
|
|
+ eb->ctx = i915_gem_context_get(ctx);
|
|
|
+ eb->vm = ctx->ppgtt ? &ctx->ppgtt->base : &eb->i915->ggtt.base;
|
|
|
+
|
|
|
+ return 0;
|
|
|
}
|
|
|
|
|
|
static bool gpu_write_needs_clflush(struct drm_i915_gem_object *obj)
|
|
@@ -1327,12 +1305,11 @@ static void eb_export_fence(struct drm_i915_gem_object *obj,
|
|
|
}
|
|
|
|
|
|
static void
|
|
|
-i915_gem_execbuffer_move_to_active(struct list_head *vmas,
|
|
|
- struct drm_i915_gem_request *req)
|
|
|
+eb_move_to_active(struct i915_execbuffer *eb)
|
|
|
{
|
|
|
struct i915_vma *vma;
|
|
|
|
|
|
- list_for_each_entry(vma, vmas, exec_list) {
|
|
|
+ list_for_each_entry(vma, &eb->vmas, exec_list) {
|
|
|
struct drm_i915_gem_object *obj = vma->obj;
|
|
|
|
|
|
obj->base.write_domain = obj->base.pending_write_domain;
|
|
@@ -1342,8 +1319,8 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
|
|
|
obj->base.pending_read_domains |= obj->base.read_domains;
|
|
|
obj->base.read_domains = obj->base.pending_read_domains;
|
|
|
|
|
|
- i915_vma_move_to_active(vma, req, vma->exec_entry->flags);
|
|
|
- eb_export_fence(obj, req, vma->exec_entry->flags);
|
|
|
+ i915_vma_move_to_active(vma, eb->request, vma->exec_entry->flags);
|
|
|
+ eb_export_fence(obj, eb->request, vma->exec_entry->flags);
|
|
|
}
|
|
|
}
|
|
|
|
|
@@ -1373,29 +1350,22 @@ i915_reset_gen7_sol_offsets(struct drm_i915_gem_request *req)
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return 0;
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}
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-static struct i915_vma *
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-i915_gem_execbuffer_parse(struct intel_engine_cs *engine,
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- struct drm_i915_gem_exec_object2 *shadow_exec_entry,
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- struct drm_i915_gem_object *batch_obj,
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- struct eb_vmas *eb,
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- u32 batch_start_offset,
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- u32 batch_len,
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- bool is_master)
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+static struct i915_vma *eb_parse(struct i915_execbuffer *eb, bool is_master)
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{
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struct drm_i915_gem_object *shadow_batch_obj;
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struct i915_vma *vma;
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int ret;
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- shadow_batch_obj = i915_gem_batch_pool_get(&engine->batch_pool,
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- PAGE_ALIGN(batch_len));
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+ shadow_batch_obj = i915_gem_batch_pool_get(&eb->engine->batch_pool,
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+ PAGE_ALIGN(eb->batch_len));
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if (IS_ERR(shadow_batch_obj))
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return ERR_CAST(shadow_batch_obj);
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- ret = intel_engine_cmd_parser(engine,
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- batch_obj,
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+ ret = intel_engine_cmd_parser(eb->engine,
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+ eb->batch->obj,
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shadow_batch_obj,
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- batch_start_offset,
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- batch_len,
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+ eb->batch_start_offset,
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+ eb->batch_len,
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is_master);
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if (ret) {
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if (ret == -EACCES) /* unhandled chained batch */
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@@ -1409,9 +1379,8 @@ i915_gem_execbuffer_parse(struct intel_engine_cs *engine,
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if (IS_ERR(vma))
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goto out;
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- memset(shadow_exec_entry, 0, sizeof(*shadow_exec_entry));
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-
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- vma->exec_entry = shadow_exec_entry;
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+ vma->exec_entry =
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+ memset(&eb->shadow_exec_entry, 0, sizeof(*vma->exec_entry));
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vma->exec_entry->flags = __EXEC_OBJECT_HAS_PIN;
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i915_gem_object_get(shadow_batch_obj);
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list_add_tail(&vma->exec_list, &eb->vmas);
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@@ -1430,46 +1399,33 @@ add_to_client(struct drm_i915_gem_request *req,
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}
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static int
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-execbuf_submit(struct i915_execbuffer_params *params,
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- struct drm_i915_gem_execbuffer2 *args,
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- struct list_head *vmas)
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+execbuf_submit(struct i915_execbuffer *eb)
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{
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- u64 exec_start, exec_len;
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int ret;
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- ret = i915_gem_execbuffer_move_to_gpu(params->request, vmas);
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+ ret = eb_move_to_gpu(eb);
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if (ret)
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return ret;
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- ret = i915_switch_context(params->request);
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+ ret = i915_switch_context(eb->request);
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if (ret)
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return ret;
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- if (args->flags & I915_EXEC_CONSTANTS_MASK) {
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- DRM_DEBUG("I915_EXEC_CONSTANTS_* unsupported\n");
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- return -EINVAL;
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- }
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-
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- if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
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- ret = i915_reset_gen7_sol_offsets(params->request);
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+ if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) {
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+ ret = i915_reset_gen7_sol_offsets(eb->request);
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if (ret)
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return ret;
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}
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- exec_len = args->batch_len;
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- exec_start = params->batch->node.start +
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- params->args_batch_start_offset;
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-
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- if (exec_len == 0)
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- exec_len = params->batch->size - params->args_batch_start_offset;
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-
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- ret = params->engine->emit_bb_start(params->request,
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- exec_start, exec_len,
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- params->dispatch_flags);
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+ ret = eb->engine->emit_bb_start(eb->request,
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+ eb->batch->node.start +
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+ eb->batch_start_offset,
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+ eb->batch_len,
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+ eb->dispatch_flags);
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if (ret)
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return ret;
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- i915_gem_execbuffer_move_to_active(vmas, params->request);
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+ eb_move_to_active(eb);
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return 0;
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}
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@@ -1551,27 +1507,16 @@ eb_select_engine(struct drm_i915_private *dev_priv,
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}
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static int
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-i915_gem_do_execbuffer(struct drm_device *dev, void *data,
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+i915_gem_do_execbuffer(struct drm_device *dev,
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struct drm_file *file,
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struct drm_i915_gem_execbuffer2 *args,
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struct drm_i915_gem_exec_object2 *exec)
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{
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- struct drm_i915_private *dev_priv = to_i915(dev);
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- struct i915_ggtt *ggtt = &dev_priv->ggtt;
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- struct eb_vmas *eb;
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- struct drm_i915_gem_exec_object2 shadow_exec_entry;
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- struct intel_engine_cs *engine;
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- struct i915_gem_context *ctx;
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- struct i915_address_space *vm;
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- struct i915_execbuffer_params params_master; /* XXX: will be removed later */
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- struct i915_execbuffer_params *params = ¶ms_master;
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- const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
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- u32 dispatch_flags;
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+ struct i915_execbuffer eb;
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struct dma_fence *in_fence = NULL;
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struct sync_file *out_fence = NULL;
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int out_fence_fd = -1;
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int ret;
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- bool need_relocs;
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if (!i915_gem_check_execbuffer(args))
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return -EINVAL;
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@@ -1580,37 +1525,42 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
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if (ret)
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return ret;
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- dispatch_flags = 0;
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+ eb.i915 = to_i915(dev);
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+ eb.file = file;
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+ eb.args = args;
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+ eb.exec = exec;
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+ eb.need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
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+ reloc_cache_init(&eb.reloc_cache, eb.i915);
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+
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+ eb.batch_start_offset = args->batch_start_offset;
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+ eb.batch_len = args->batch_len;
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+
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+ eb.dispatch_flags = 0;
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if (args->flags & I915_EXEC_SECURE) {
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if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN))
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return -EPERM;
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|
|
- dispatch_flags |= I915_DISPATCH_SECURE;
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+ eb.dispatch_flags |= I915_DISPATCH_SECURE;
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}
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if (args->flags & I915_EXEC_IS_PINNED)
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- dispatch_flags |= I915_DISPATCH_PINNED;
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-
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- engine = eb_select_engine(dev_priv, file, args);
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- if (!engine)
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- return -EINVAL;
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+ eb.dispatch_flags |= I915_DISPATCH_PINNED;
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- if (args->buffer_count < 1) {
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- DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
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+ eb.engine = eb_select_engine(eb.i915, file, args);
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+ if (!eb.engine)
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return -EINVAL;
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- }
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if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
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- if (!HAS_RESOURCE_STREAMER(dev_priv)) {
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+ if (!HAS_RESOURCE_STREAMER(eb.i915)) {
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DRM_DEBUG("RS is only allowed for Haswell, Gen8 and above\n");
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return -EINVAL;
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}
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- if (engine->id != RCS) {
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+ if (eb.engine->id != RCS) {
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DRM_DEBUG("RS is not available on %s\n",
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- engine->name);
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+ eb.engine->name);
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return -EINVAL;
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}
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- dispatch_flags |= I915_DISPATCH_RS;
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+ eb.dispatch_flags |= I915_DISPATCH_RS;
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}
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if (args->flags & I915_EXEC_FENCE_IN) {
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@@ -1633,59 +1583,44 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
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* wakeref that we hold until the GPU has been idle for at least
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* 100ms.
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*/
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- intel_runtime_pm_get(dev_priv);
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+ intel_runtime_pm_get(eb.i915);
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ret = i915_mutex_lock_interruptible(dev);
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if (ret)
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goto pre_mutex_err;
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- ctx = i915_gem_validate_context(dev, file, engine, ctx_id);
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- if (IS_ERR(ctx)) {
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+ ret = eb_select_context(&eb);
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+ if (ret) {
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mutex_unlock(&dev->struct_mutex);
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|
- ret = PTR_ERR(ctx);
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goto pre_mutex_err;
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}
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|
|
- i915_gem_context_get(ctx);
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-
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- if (ctx->ppgtt)
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- vm = &ctx->ppgtt->base;
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- else
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- vm = &ggtt->base;
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-
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- memset(¶ms_master, 0x00, sizeof(params_master));
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-
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- eb = eb_create(dev_priv, args);
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- if (eb == NULL) {
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- i915_gem_context_put(ctx);
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+ if (eb_create(&eb)) {
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+ i915_gem_context_put(eb.ctx);
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|
mutex_unlock(&dev->struct_mutex);
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|
ret = -ENOMEM;
|
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|
goto pre_mutex_err;
|
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|
}
|
|
|
|
|
|
/* Look up object handles */
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|
|
- ret = eb_lookup_vmas(eb, exec, args, vm, file);
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|
+ ret = eb_lookup_vmas(&eb);
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|
if (ret)
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goto err;
|
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|
|
|
|
/* take note of the batch buffer before we might reorder the lists */
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|
|
- params->batch = eb_get_batch(eb);
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|
+ eb.batch = eb_get_batch(&eb);
|
|
|
|
|
|
/* Move the objects en-masse into the GTT, evicting if necessary. */
|
|
|
- need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
|
|
|
- ret = i915_gem_execbuffer_reserve(engine, &eb->vmas, ctx,
|
|
|
- &need_relocs);
|
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|
+ ret = eb_reserve(&eb);
|
|
|
if (ret)
|
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|
goto err;
|
|
|
|
|
|
/* The objects are in their final locations, apply the relocations. */
|
|
|
- if (need_relocs)
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|
|
- ret = i915_gem_execbuffer_relocate(eb);
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|
+ if (eb.need_relocs)
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|
+ ret = eb_relocate(&eb);
|
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|
if (ret) {
|
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|
if (ret == -EFAULT) {
|
|
|
- ret = i915_gem_execbuffer_relocate_slow(dev, args, file,
|
|
|
- engine,
|
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|
- eb, exec, ctx);
|
|
|
+ ret = eb_relocate_slow(&eb);
|
|
|
BUG_ON(!mutex_is_locked(&dev->struct_mutex));
|
|
|
}
|
|
|
if (ret)
|
|
@@ -1693,28 +1628,22 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
|
|
|
}
|
|
|
|
|
|
/* Set the pending read domains for the batch buffer to COMMAND */
|
|
|
- if (params->batch->obj->base.pending_write_domain) {
|
|
|
+ if (eb.batch->obj->base.pending_write_domain) {
|
|
|
DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
|
|
|
ret = -EINVAL;
|
|
|
goto err;
|
|
|
}
|
|
|
- if (args->batch_start_offset > params->batch->size ||
|
|
|
- args->batch_len > params->batch->size - args->batch_start_offset) {
|
|
|
+ if (eb.batch_start_offset > eb.batch->size ||
|
|
|
+ eb.batch_len > eb.batch->size - eb.batch_start_offset) {
|
|
|
DRM_DEBUG("Attempting to use out-of-bounds batch\n");
|
|
|
ret = -EINVAL;
|
|
|
goto err;
|
|
|
}
|
|
|
|
|
|
- params->args_batch_start_offset = args->batch_start_offset;
|
|
|
- if (engine->needs_cmd_parser && args->batch_len) {
|
|
|
+ if (eb.engine->needs_cmd_parser && eb.batch_len) {
|
|
|
struct i915_vma *vma;
|
|
|
|
|
|
- vma = i915_gem_execbuffer_parse(engine, &shadow_exec_entry,
|
|
|
- params->batch->obj,
|
|
|
- eb,
|
|
|
- args->batch_start_offset,
|
|
|
- args->batch_len,
|
|
|
- drm_is_current_master(file));
|
|
|
+ vma = eb_parse(&eb, drm_is_current_master(file));
|
|
|
if (IS_ERR(vma)) {
|
|
|
ret = PTR_ERR(vma);
|
|
|
goto err;
|
|
@@ -1730,19 +1659,21 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
|
|
|
* specifically don't want that set on batches the
|
|
|
* command parser has accepted.
|
|
|
*/
|
|
|
- dispatch_flags |= I915_DISPATCH_SECURE;
|
|
|
- params->args_batch_start_offset = 0;
|
|
|
- params->batch = vma;
|
|
|
+ eb.dispatch_flags |= I915_DISPATCH_SECURE;
|
|
|
+ eb.batch_start_offset = 0;
|
|
|
+ eb.batch = vma;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
- params->batch->obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
|
|
|
+ eb.batch->obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
|
|
|
+ if (eb.batch_len == 0)
|
|
|
+ eb.batch_len = eb.batch->size - eb.batch_start_offset;
|
|
|
|
|
|
/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
|
|
|
* batch" bit. Hence we need to pin secure batches into the global gtt.
|
|
|
* hsw should have this fixed, but bdw mucks it up again. */
|
|
|
- if (dispatch_flags & I915_DISPATCH_SECURE) {
|
|
|
- struct drm_i915_gem_object *obj = params->batch->obj;
|
|
|
+ if (eb.dispatch_flags & I915_DISPATCH_SECURE) {
|
|
|
+ struct drm_i915_gem_object *obj = eb.batch->obj;
|
|
|
struct i915_vma *vma;
|
|
|
|
|
|
/*
|
|
@@ -1761,25 +1692,24 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
|
|
|
goto err;
|
|
|
}
|
|
|
|
|
|
- params->batch = vma;
|
|
|
+ eb.batch = vma;
|
|
|
}
|
|
|
|
|
|
/* Allocate a request for this batch buffer nice and early. */
|
|
|
- params->request = i915_gem_request_alloc(engine, ctx);
|
|
|
- if (IS_ERR(params->request)) {
|
|
|
- ret = PTR_ERR(params->request);
|
|
|
+ eb.request = i915_gem_request_alloc(eb.engine, eb.ctx);
|
|
|
+ if (IS_ERR(eb.request)) {
|
|
|
+ ret = PTR_ERR(eb.request);
|
|
|
goto err_batch_unpin;
|
|
|
}
|
|
|
|
|
|
if (in_fence) {
|
|
|
- ret = i915_gem_request_await_dma_fence(params->request,
|
|
|
- in_fence);
|
|
|
+ ret = i915_gem_request_await_dma_fence(eb.request, in_fence);
|
|
|
if (ret < 0)
|
|
|
goto err_request;
|
|
|
}
|
|
|
|
|
|
if (out_fence_fd != -1) {
|
|
|
- out_fence = sync_file_create(¶ms->request->fence);
|
|
|
+ out_fence = sync_file_create(&eb.request->fence);
|
|
|
if (!out_fence) {
|
|
|
ret = -ENOMEM;
|
|
|
goto err_request;
|
|
@@ -1792,26 +1722,13 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
|
|
|
* inactive_list and lose its active reference. Hence we do not need
|
|
|
* to explicitly hold another reference here.
|
|
|
*/
|
|
|
- params->request->batch = params->batch;
|
|
|
-
|
|
|
- /*
|
|
|
- * Save assorted stuff away to pass through to *_submission().
|
|
|
- * NB: This data should be 'persistent' and not local as it will
|
|
|
- * kept around beyond the duration of the IOCTL once the GPU
|
|
|
- * scheduler arrives.
|
|
|
- */
|
|
|
- params->dev = dev;
|
|
|
- params->file = file;
|
|
|
- params->engine = engine;
|
|
|
- params->dispatch_flags = dispatch_flags;
|
|
|
- params->ctx = ctx;
|
|
|
+ eb.request->batch = eb.batch;
|
|
|
|
|
|
- trace_i915_gem_request_queue(params->request, dispatch_flags);
|
|
|
-
|
|
|
- ret = execbuf_submit(params, args, &eb->vmas);
|
|
|
+ trace_i915_gem_request_queue(eb.request, eb.dispatch_flags);
|
|
|
+ ret = execbuf_submit(&eb);
|
|
|
err_request:
|
|
|
- __i915_add_request(params->request, ret == 0);
|
|
|
- add_to_client(params->request, file);
|
|
|
+ __i915_add_request(eb.request, ret == 0);
|
|
|
+ add_to_client(eb.request, file);
|
|
|
|
|
|
if (out_fence) {
|
|
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if (ret == 0) {
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@@ -1831,19 +1748,17 @@ err_batch_unpin:
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* needs to be adjusted to also track the ggtt batch vma properly as
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* active.
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*/
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- if (dispatch_flags & I915_DISPATCH_SECURE)
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- i915_vma_unpin(params->batch);
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+ if (eb.dispatch_flags & I915_DISPATCH_SECURE)
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+ i915_vma_unpin(eb.batch);
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err:
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/* the request owns the ref now */
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- i915_gem_context_put(ctx);
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- eb_destroy(eb);
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-
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+ eb_destroy(&eb);
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mutex_unlock(&dev->struct_mutex);
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pre_mutex_err:
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/* intel_gpu_busy should also get a ref, so it will free when the device
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* is really idle. */
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- intel_runtime_pm_put(dev_priv);
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+ intel_runtime_pm_put(eb.i915);
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if (out_fence_fd != -1)
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put_unused_fd(out_fence_fd);
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err_in_fence:
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@@ -1914,7 +1829,7 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
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exec2.flags = I915_EXEC_RENDER;
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i915_execbuffer2_set_context_id(exec2, 0);
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- ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list);
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+ ret = i915_gem_do_execbuffer(dev, file, &exec2, exec2_list);
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if (!ret) {
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struct drm_i915_gem_exec_object __user *user_exec_list =
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u64_to_user_ptr(args->buffers_ptr);
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@@ -1973,7 +1888,7 @@ i915_gem_execbuffer2(struct drm_device *dev, void *data,
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return -EFAULT;
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}
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- ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list);
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+ ret = i915_gem_do_execbuffer(dev, file, args, exec2_list);
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if (!ret) {
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/* Copy the new buffer offsets back to the user's exec list. */
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struct drm_i915_gem_exec_object2 __user *user_exec_list =
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