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@@ -61,8 +61,7 @@
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#define MACB_WOL_HAS_MAGIC_PACKET (0x1 << 0)
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#define MACB_WOL_ENABLED (0x1 << 1)
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-/*
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- * Graceful stop timeouts in us. We should allow up to
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+/* Graceful stop timeouts in us. We should allow up to
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* 1 frame time (10 Mbits/s, full-duplex, ignoring collisions)
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*/
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#define MACB_HALT_TIMEOUT 1230
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@@ -130,8 +129,7 @@ static void hw_writel(struct macb *bp, int offset, u32 value)
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writel_relaxed(value, bp->regs + offset);
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}
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-/*
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- * Find the CPU endianness by using the loopback bit of NCR register. When the
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+/* Find the CPU endianness by using the loopback bit of NCR register. When the
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* CPU is in big endian we need to program swaped mode for management
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* descriptor access.
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*/
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@@ -386,7 +384,8 @@ static int macb_mii_probe(struct net_device *dev)
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pdata = dev_get_platdata(&bp->pdev->dev);
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if (pdata && gpio_is_valid(pdata->phy_irq_pin)) {
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- ret = devm_gpio_request(&bp->pdev->dev, pdata->phy_irq_pin, "phy int");
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+ ret = devm_gpio_request(&bp->pdev->dev, pdata->phy_irq_pin,
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+ "phy int");
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if (!ret) {
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phy_irq = gpio_to_irq(pdata->phy_irq_pin);
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phydev->irq = (phy_irq < 0) ? PHY_POLL : phy_irq;
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@@ -452,7 +451,8 @@ static int macb_mii_init(struct macb *bp)
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err = of_mdiobus_register(bp->mii_bus, np);
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/* fallback to standard phy registration if no phy were
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- found during dt phy registration */
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+ * found during dt phy registration
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+ */
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if (!err && !phy_find_first(bp->mii_bus)) {
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for (i = 0; i < PHY_MAX_ADDR; i++) {
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struct phy_device *phydev;
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@@ -567,8 +567,7 @@ static void macb_tx_error_task(struct work_struct *work)
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/* Make sure nobody is trying to queue up new packets */
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netif_tx_stop_all_queues(bp->dev);
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- /*
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- * Stop transmission now
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+ /* Stop transmission now
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* (in case we have just queued new packets)
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* macb/gem must be halted to write TBQP register
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*/
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@@ -576,8 +575,7 @@ static void macb_tx_error_task(struct work_struct *work)
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/* Just complain for now, reinitializing TX path can be good */
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netdev_err(bp->dev, "BUG: halt tx timed out\n");
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- /*
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- * Treat frames in TX queue including the ones that caused the error.
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+ /* Treat frames in TX queue including the ones that caused the error.
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* Free transmit buffers in upper layer.
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*/
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for (tail = queue->tx_tail; tail != queue->tx_head; tail++) {
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@@ -607,10 +605,9 @@ static void macb_tx_error_task(struct work_struct *work)
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bp->stats.tx_bytes += skb->len;
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}
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} else {
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- /*
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- * "Buffers exhausted mid-frame" errors may only happen
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- * if the driver is buggy, so complain loudly about those.
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- * Statistics are updated by hardware.
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+ /* "Buffers exhausted mid-frame" errors may only happen
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+ * if the driver is buggy, so complain loudly about
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+ * those. Statistics are updated by hardware.
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*/
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if (ctrl & MACB_BIT(TX_BUF_EXHAUSTED))
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netdev_err(bp->dev,
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@@ -722,7 +719,8 @@ static void gem_rx_refill(struct macb *bp)
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struct sk_buff *skb;
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dma_addr_t paddr;
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- while (CIRC_SPACE(bp->rx_prepared_head, bp->rx_tail, RX_RING_SIZE) > 0) {
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+ while (CIRC_SPACE(bp->rx_prepared_head, bp->rx_tail,
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+ RX_RING_SIZE) > 0) {
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entry = macb_rx_ring_wrap(bp->rx_prepared_head);
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/* Make hw descriptor updates visible to CPU */
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@@ -741,7 +739,8 @@ static void gem_rx_refill(struct macb *bp)
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/* now fill corresponding descriptor entry */
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paddr = dma_map_single(&bp->pdev->dev, skb->data,
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- bp->rx_buffer_size, DMA_FROM_DEVICE);
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+ bp->rx_buffer_size,
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+ DMA_FROM_DEVICE);
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if (dma_mapping_error(&bp->pdev->dev, paddr)) {
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dev_kfree_skb(skb);
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break;
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@@ -777,14 +776,14 @@ static void discard_partial_frame(struct macb *bp, unsigned int begin,
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for (frag = begin; frag != end; frag++) {
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struct macb_dma_desc *desc = macb_rx_desc(bp, frag);
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+
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desc->addr &= ~MACB_BIT(RX_USED);
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}
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/* Make descriptor updates visible to hardware */
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wmb();
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- /*
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- * When this happens, the hardware stats registers for
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+ /* When this happens, the hardware stats registers for
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* whatever caused this is updated, so we don't have to record
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* anything.
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*/
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@@ -883,8 +882,7 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag,
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macb_rx_ring_wrap(first_frag),
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macb_rx_ring_wrap(last_frag), len);
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- /*
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- * The ethernet header starts NET_IP_ALIGN bytes into the
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+ /* The ethernet header starts NET_IP_ALIGN bytes into the
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* first buffer. Since the header is 14 bytes, this makes the
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* payload word-aligned.
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*
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@@ -1099,8 +1097,7 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
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(unsigned long)status);
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if (status & MACB_RX_INT_FLAGS) {
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- /*
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- * There's no point taking any more interrupts
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+ /* There's no point taking any more interrupts
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* until we have processed the buffers. The
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* scheduling call may fail if the poll routine
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* is already scheduled, so disable interrupts
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@@ -1129,8 +1126,7 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
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if (status & MACB_BIT(TCOMP))
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macb_tx_interrupt(queue);
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- /*
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- * Link change detection isn't possible with RMII, so we'll
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+ /* Link change detection isn't possible with RMII, so we'll
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* add that if/when we get our hands on a full-blown MII PHY.
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*/
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@@ -1161,8 +1157,7 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
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}
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if (status & MACB_BIT(HRESP)) {
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- /*
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- * TODO: Reset the hardware, and maybe move the
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+ /* TODO: Reset the hardware, and maybe move the
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* netdev_err to a lower-priority context as well
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* (work queue?)
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*/
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@@ -1181,8 +1176,7 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
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}
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#ifdef CONFIG_NET_POLL_CONTROLLER
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-/*
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- * Polling receive - used by netconsole and other diagnostic tools
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+/* Polling receive - used by netconsole and other diagnostic tools
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* to allow network i/o with interrupts disabled.
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*/
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static void macb_poll_controller(struct net_device *dev)
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@@ -1478,10 +1472,10 @@ static int gem_alloc_rx_buffers(struct macb *bp)
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bp->rx_skbuff = kzalloc(size, GFP_KERNEL);
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if (!bp->rx_skbuff)
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return -ENOMEM;
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- else
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- netdev_dbg(bp->dev,
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- "Allocated %d RX struct sk_buff entries at %p\n",
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- RX_RING_SIZE, bp->rx_skbuff);
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+
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+ netdev_dbg(bp->dev,
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+ "Allocated %d RX struct sk_buff entries at %p\n",
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+ RX_RING_SIZE, bp->rx_skbuff);
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return 0;
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}
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@@ -1494,10 +1488,10 @@ static int macb_alloc_rx_buffers(struct macb *bp)
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&bp->rx_buffers_dma, GFP_KERNEL);
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if (!bp->rx_buffers)
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return -ENOMEM;
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- else
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- netdev_dbg(bp->dev,
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- "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
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- size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers);
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+
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+ netdev_dbg(bp->dev,
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+ "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
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+ size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers);
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return 0;
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}
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@@ -1588,8 +1582,7 @@ static void macb_reset_hw(struct macb *bp)
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struct macb_queue *queue;
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unsigned int q;
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- /*
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- * Disable RX and TX (XXX: Should we halt the transmission
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+ /* Disable RX and TX (XXX: Should we halt the transmission
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* more gracefully?)
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*/
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macb_writel(bp, NCR, 0);
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@@ -1652,8 +1645,7 @@ static u32 macb_mdc_clk_div(struct macb *bp)
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return config;
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}
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-/*
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- * Get the DMA bus width field of the network configuration register that we
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+/* Get the DMA bus width field of the network configuration register that we
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* should program. We find the width from decoding the design configuration
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* register to find the maximum supported data bus width.
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*/
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@@ -1673,8 +1665,7 @@ static u32 macb_dbw(struct macb *bp)
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}
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}
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-/*
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- * Configure the receive DMA engine
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+/* Configure the receive DMA engine
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* - use the correct receive buffer size
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* - set best burst length for DMA operations
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* (if not supported by FIFO, it will fallback to default)
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@@ -1762,8 +1753,7 @@ static void macb_init_hw(struct macb *bp)
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macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE) | MACB_BIT(MPE));
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}
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-/*
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- * The hash address register is 64 bits long and takes up two
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+/* The hash address register is 64 bits long and takes up two
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* locations in the memory map. The least significant bits are stored
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* in EMAC_HSL and the most significant bits in EMAC_HSH.
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*
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@@ -1803,9 +1793,7 @@ static inline int hash_bit_value(int bitnr, __u8 *addr)
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return 0;
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}
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-/*
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- * Return the hash index value for the specified address.
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- */
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+/* Return the hash index value for the specified address. */
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static int hash_get_index(__u8 *addr)
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{
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int i, j, bitval;
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@@ -1821,9 +1809,7 @@ static int hash_get_index(__u8 *addr)
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return hash_index;
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}
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-/*
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- * Add multicast addresses to the internal multicast-hash table.
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- */
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+/* Add multicast addresses to the internal multicast-hash table. */
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static void macb_sethashtable(struct net_device *dev)
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{
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struct netdev_hw_addr *ha;
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@@ -1842,9 +1828,7 @@ static void macb_sethashtable(struct net_device *dev)
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macb_or_gem_writel(bp, HRT, mc_filter[1]);
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}
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-/*
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- * Enable/Disable promiscuous and multicast modes.
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- */
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+/* Enable/Disable promiscuous and multicast modes. */
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static void macb_set_rx_mode(struct net_device *dev)
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{
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unsigned long cfg;
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@@ -2161,9 +2145,8 @@ static void macb_get_regs(struct net_device *dev, struct ethtool_regs *regs,
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if (!(bp->caps & MACB_CAPS_USRIO_DISABLED))
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regs_buff[12] = macb_or_gem_readl(bp, USRIO);
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- if (macb_is_gem(bp)) {
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+ if (macb_is_gem(bp))
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regs_buff[13] = gem_readl(bp, DMACFG);
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- }
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}
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static void macb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
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@@ -2286,11 +2269,11 @@ static const struct net_device_ops macb_netdev_ops = {
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.ndo_set_features = macb_set_features,
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};
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-/*
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- * Configure peripheral capabilities according to device tree
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+/* Configure peripheral capabilities according to device tree
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* and integration options used
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*/
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-static void macb_configure_caps(struct macb *bp, const struct macb_config *dt_conf)
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+static void macb_configure_caps(struct macb *bp,
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+ const struct macb_config *dt_conf)
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{
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u32 dcfg;
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@@ -2996,6 +2979,7 @@ static int macb_probe(struct platform_device *pdev)
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phy_node = of_get_next_available_child(np, NULL);
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if (phy_node) {
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int gpio = of_get_named_gpio(phy_node, "reset-gpios", 0);
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+
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if (gpio_is_valid(gpio)) {
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bp->reset_gpio = gpio_to_desc(gpio);
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gpiod_direction_output(bp->reset_gpio, 1);
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