|
@@ -98,7 +98,7 @@ static struct plat_sci_port scif3_platform_data = {
|
|
|
.flags = UPF_BOOT_AUTOCONF,
|
|
|
.port_reg = SCIx_NOT_SUPPORTED,
|
|
|
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
|
|
- .scbrr_algo_id = SCBRR_ALGO_3,
|
|
|
+ .sampling_rate = 8,
|
|
|
.type = PORT_SCIFA,
|
|
|
};
|
|
|
|
|
@@ -121,7 +121,7 @@ static struct plat_sci_port scif4_platform_data = {
|
|
|
.port_reg = SCIx_NOT_SUPPORTED,
|
|
|
.flags = UPF_BOOT_AUTOCONF,
|
|
|
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
|
|
- .scbrr_algo_id = SCBRR_ALGO_3,
|
|
|
+ .sampling_rate = 8,
|
|
|
.type = PORT_SCIFA,
|
|
|
};
|
|
|
|
|
@@ -144,7 +144,7 @@ static struct plat_sci_port scif5_platform_data = {
|
|
|
.port_reg = SCIx_NOT_SUPPORTED,
|
|
|
.flags = UPF_BOOT_AUTOCONF,
|
|
|
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
|
|
- .scbrr_algo_id = SCBRR_ALGO_3,
|
|
|
+ .sampling_rate = 8,
|
|
|
.type = PORT_SCIFA,
|
|
|
};
|
|
|
|