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@@ -111,8 +111,7 @@ static struct pci_ops fsl_indirect_pcie_ops =
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.write = indirect_write_config,
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};
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-#define MAX_PHYS_ADDR_BITS 40
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-static u64 pci64_dma_offset = 1ull << MAX_PHYS_ADDR_BITS;
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+static u64 pci64_dma_offset;
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#ifdef CONFIG_SWIOTLB
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static void setup_swiotlb_ops(struct pci_controller *hose)
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@@ -132,12 +131,10 @@ static int fsl_pci_dma_set_mask(struct device *dev, u64 dma_mask)
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return -EIO;
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/*
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- * Fixup PCI devices that are able to DMA to above the physical
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- * address width of the SoC such that we can address any internal
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- * SoC address from across PCI if needed
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+ * Fix up PCI devices that are able to DMA to the large inbound
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+ * mapping that allows addressing any RAM address from across PCI.
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*/
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- if ((dev_is_pci(dev)) &&
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- dma_mask >= DMA_BIT_MASK(MAX_PHYS_ADDR_BITS)) {
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+ if (dev_is_pci(dev) && dma_mask >= pci64_dma_offset * 2 - 1) {
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set_dma_ops(dev, &dma_direct_ops);
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set_dma_offset(dev, pci64_dma_offset);
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}
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@@ -387,6 +384,7 @@ static void setup_pci_atmu(struct pci_controller *hose)
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mem_log++;
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piwar = (piwar & ~PIWAR_SZ_MASK) | (mem_log - 1);
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+ pci64_dma_offset = 1ULL << mem_log;
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if (setup_inbound) {
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/* Setup inbound memory window */
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