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@@ -845,7 +845,7 @@ static int hdmi_portclock_limit(struct intel_hdmi *hdmi)
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{
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struct drm_device *dev = intel_hdmi_to_dev(hdmi);
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- if (IS_G4X(dev))
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+ if (!hdmi->has_hdmi_sink || IS_G4X(dev))
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return 165000;
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else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8)
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return 300000;
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@@ -899,8 +899,8 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
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* outputs. We also need to check that the higher clock still fits
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* within limits.
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*/
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- if (pipe_config->pipe_bpp > 8*3 && clock_12bpc <= portclock_limit
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- && HAS_PCH_SPLIT(dev)) {
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+ if (pipe_config->pipe_bpp > 8*3 && intel_hdmi->has_hdmi_sink &&
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+ clock_12bpc <= portclock_limit && HAS_PCH_SPLIT(dev)) {
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DRM_DEBUG_KMS("picking bpc to 12 for HDMI output\n");
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desired_bpp = 12*3;
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