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@@ -0,0 +1,585 @@
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+/*
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+ * Copyright (C) 2015-2017 Netronome Systems, Inc.
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+ *
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+ * This software is dual licensed under the GNU General License Version 2,
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+ * June 1991 as shown in the file COPYING in the top-level directory of this
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+ * source tree or the BSD 2-Clause License provided below. You have the
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+ * option to license this software under the complete terms of either license.
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+ *
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+ * The BSD 2-Clause License:
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+ *
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+ * Redistribution and use in source and binary forms, with or
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+ * without modification, are permitted provided that the following
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+ * conditions are met:
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+ *
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+ * 1. Redistributions of source code must retain the above
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+ * copyright notice, this list of conditions and the following
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+ * disclaimer.
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+ *
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+ * 2. Redistributions in binary form must reproduce the above
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+ * copyright notice, this list of conditions and the following
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+ * disclaimer in the documentation and/or other materials
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+ * provided with the distribution.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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+ * SOFTWARE.
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+ */
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+
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+/*
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+ * nfp_net_main.c
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+ * Netronome network device driver: Main entry point
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+ * Authors: Jakub Kicinski <jakub.kicinski@netronome.com>
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+ * Alejandro Lucero <alejandro.lucero@netronome.com>
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+ * Jason McMullan <jason.mcmullan@netronome.com>
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+ * Rolf Neugebauer <rolf.neugebauer@netronome.com>
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+ */
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+
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+#include <linux/etherdevice.h>
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/pci.h>
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+#include <linux/pci_regs.h>
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+#include <linux/msi.h>
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+#include <linux/random.h>
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+
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+#include "nfpcore/nfp.h"
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+#include "nfpcore/nfp_cpp.h"
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+#include "nfpcore/nfp_nffw.h"
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+#include "nfpcore/nfp_nsp_eth.h"
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+#include "nfpcore/nfp6000_pcie.h"
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+
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+#include "nfp_net_ctrl.h"
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+#include "nfp_net.h"
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+#include "nfp_main.h"
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+
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+#define NFP_PF_CSR_SLICE_SIZE (32 * 1024)
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+
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+static int nfp_is_ready(struct nfp_cpp *cpp)
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+{
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+ const char *cp;
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+ long state;
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+ int err;
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+
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+ cp = nfp_hwinfo_lookup(cpp, "board.state");
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+ if (!cp)
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+ return 0;
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+
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+ err = kstrtol(cp, 0, &state);
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+ if (err < 0)
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+ return 0;
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+
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+ return state == 15;
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+}
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+
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+/**
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+ * nfp_net_map_area() - Help function to map an area
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+ * @cpp: NFP CPP handler
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+ * @name: Name for the area
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+ * @target: CPP target
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+ * @addr: CPP address
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+ * @size: Size of the area
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+ * @area: Area handle (returned).
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+ *
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+ * This function is primarily to simplify the code in the main probe
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+ * function. To undo the effect of this functions call
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+ * @nfp_cpp_area_release_free(*area);
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+ *
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+ * Return: Pointer to memory mapped area or ERR_PTR
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+ */
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+static u8 __iomem *nfp_net_map_area(struct nfp_cpp *cpp,
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+ const char *name, int isl, int target,
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+ unsigned long long addr, unsigned long size,
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+ struct nfp_cpp_area **area)
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+{
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+ u8 __iomem *res;
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+ u32 dest;
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+ int err;
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+
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+ dest = NFP_CPP_ISLAND_ID(target, NFP_CPP_ACTION_RW, 0, isl);
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+
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+ *area = nfp_cpp_area_alloc_with_name(cpp, dest, name, addr, size);
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+ if (!*area) {
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+ err = -EIO;
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+ goto err_area;
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+ }
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+
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+ err = nfp_cpp_area_acquire(*area);
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+ if (err < 0)
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+ goto err_acquire;
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+
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+ res = nfp_cpp_area_iomem(*area);
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+ if (!res) {
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+ err = -EIO;
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+ goto err_map;
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+ }
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+
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+ return res;
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+
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+err_map:
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+ nfp_cpp_area_release(*area);
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+err_acquire:
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+ nfp_cpp_area_free(*area);
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+err_area:
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+ return (u8 __iomem *)ERR_PTR(err);
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+}
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+
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+static void
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+nfp_net_get_mac_addr_hwinfo(struct nfp_net *nn, struct nfp_cpp *cpp,
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+ unsigned int id)
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+{
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+ u8 mac_addr[ETH_ALEN];
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+ const char *mac_str;
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+ char name[32];
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+
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+ snprintf(name, sizeof(name), "eth%d.mac", id);
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+
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+ mac_str = nfp_hwinfo_lookup(cpp, name);
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+ if (!mac_str) {
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+ dev_warn(&nn->pdev->dev,
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+ "Can't lookup MAC address. Generate\n");
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+ eth_hw_addr_random(nn->netdev);
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+ return;
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+ }
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+
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+ if (sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
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+ &mac_addr[0], &mac_addr[1], &mac_addr[2],
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+ &mac_addr[3], &mac_addr[4], &mac_addr[5]) != 6) {
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+ dev_warn(&nn->pdev->dev,
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+ "Can't parse MAC address (%s). Generate.\n", mac_str);
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+ eth_hw_addr_random(nn->netdev);
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+ return;
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+ }
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+
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+ ether_addr_copy(nn->netdev->dev_addr, mac_addr);
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+ ether_addr_copy(nn->netdev->perm_addr, mac_addr);
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+}
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+
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+/**
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+ * nfp_net_get_mac_addr() - Get the MAC address.
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+ * @nn: NFP Network structure
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+ * @pf: NFP PF device structure
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+ * @id: NFP port id
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+ *
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+ * First try to get the MAC address from NSP ETH table. If that
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+ * fails try HWInfo. As a last resort generate a random address.
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+ */
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+static void
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+nfp_net_get_mac_addr(struct nfp_net *nn, struct nfp_pf *pf, unsigned int id)
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+{
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+ int i;
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+
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+ for (i = 0; pf->eth_tbl && i < pf->eth_tbl->count; i++)
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+ if (pf->eth_tbl->ports[i].eth_index == id) {
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+ const u8 *mac_addr = pf->eth_tbl->ports[i].mac_addr;
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+
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+ ether_addr_copy(nn->netdev->dev_addr, mac_addr);
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+ ether_addr_copy(nn->netdev->perm_addr, mac_addr);
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+ return;
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+ }
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+
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+ nfp_net_get_mac_addr_hwinfo(nn, pf->cpp, id);
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+}
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+
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+static unsigned int nfp_net_pf_get_num_ports(struct nfp_pf *pf)
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+{
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+ char name[256];
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+ u16 interface;
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+ int pcie_pf;
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+ int err = 0;
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+ u64 val;
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+
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+ interface = nfp_cpp_interface(pf->cpp);
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+ pcie_pf = NFP_CPP_INTERFACE_UNIT_of(interface);
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+
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+ snprintf(name, sizeof(name), "nfd_cfg_pf%d_num_ports", pcie_pf);
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+
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+ val = nfp_rtsym_read_le(pf->cpp, name, &err);
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+ /* Default to one port */
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+ if (err) {
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+ if (err != -ENOENT)
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+ nfp_err(pf->cpp, "Unable to read adapter port count\n");
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+ val = 1;
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+ }
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+
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+ return val;
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+}
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+
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+static unsigned int
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+nfp_net_pf_total_qcs(struct nfp_pf *pf, void __iomem *ctrl_bar,
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+ unsigned int stride, u32 start_off, u32 num_off)
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+{
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+ unsigned int i, min_qc, max_qc;
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+
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+ min_qc = readl(ctrl_bar + start_off);
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+ max_qc = min_qc;
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+
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+ for (i = 0; i < pf->num_ports; i++) {
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+ /* To make our lives simpler only accept configuration where
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+ * queues are allocated to PFs in order (queues of PFn all have
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+ * indexes lower than PFn+1).
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+ */
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+ if (max_qc > readl(ctrl_bar + start_off))
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+ return 0;
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+
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+ max_qc = readl(ctrl_bar + start_off);
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+ max_qc += readl(ctrl_bar + num_off) * stride;
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+ ctrl_bar += NFP_PF_CSR_SLICE_SIZE;
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+ }
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+
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+ return max_qc - min_qc;
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+}
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+
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+static u8 __iomem *nfp_net_pf_map_ctrl_bar(struct nfp_pf *pf)
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+{
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+ const struct nfp_rtsym *ctrl_sym;
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+ u8 __iomem *ctrl_bar;
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+ char pf_symbol[256];
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+ u16 interface;
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+ int pcie_pf;
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+
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+ interface = nfp_cpp_interface(pf->cpp);
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+ pcie_pf = NFP_CPP_INTERFACE_UNIT_of(interface);
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+
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+ snprintf(pf_symbol, sizeof(pf_symbol), "_pf%d_net_bar0", pcie_pf);
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+
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+ ctrl_sym = nfp_rtsym_lookup(pf->cpp, pf_symbol);
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+ if (!ctrl_sym) {
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+ dev_err(&pf->pdev->dev,
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+ "Failed to find PF BAR0 symbol %s\n", pf_symbol);
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+ return NULL;
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+ }
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+
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+ if (ctrl_sym->size < pf->num_ports * NFP_PF_CSR_SLICE_SIZE) {
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+ dev_err(&pf->pdev->dev,
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+ "PF BAR0 too small to contain %d ports\n",
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+ pf->num_ports);
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+ return NULL;
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+ }
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+
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+ ctrl_bar = nfp_net_map_area(pf->cpp, "net.ctrl",
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+ ctrl_sym->domain, ctrl_sym->target,
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+ ctrl_sym->addr, ctrl_sym->size,
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+ &pf->ctrl_area);
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+ if (IS_ERR(ctrl_bar)) {
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+ dev_err(&pf->pdev->dev, "Failed to map PF BAR0: %ld\n",
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+ PTR_ERR(ctrl_bar));
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+ return NULL;
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+ }
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+
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+ return ctrl_bar;
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+}
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+
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+static void nfp_net_pf_free_netdevs(struct nfp_pf *pf)
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+{
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+ struct nfp_net *nn;
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+
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+ while (!list_empty(&pf->ports)) {
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+ nn = list_first_entry(&pf->ports, struct nfp_net, port_list);
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+ list_del(&nn->port_list);
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+
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+ nfp_net_netdev_free(nn);
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+ }
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+}
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+
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+static struct nfp_net *
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+nfp_net_pf_alloc_port_netdev(struct nfp_pf *pf, void __iomem *ctrl_bar,
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+ void __iomem *tx_bar, void __iomem *rx_bar,
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+ int stride, struct nfp_net_fw_version *fw_ver)
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+{
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+ u32 n_tx_rings, n_rx_rings;
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+ struct nfp_net *nn;
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+
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+ n_tx_rings = readl(ctrl_bar + NFP_NET_CFG_MAX_TXRINGS);
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+ n_rx_rings = readl(ctrl_bar + NFP_NET_CFG_MAX_RXRINGS);
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+
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+ /* Allocate and initialise the netdev */
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+ nn = nfp_net_netdev_alloc(pf->pdev, n_tx_rings, n_rx_rings);
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+ if (IS_ERR(nn))
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+ return nn;
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+
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+ nn->fw_ver = *fw_ver;
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+ nn->ctrl_bar = ctrl_bar;
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+ nn->tx_bar = tx_bar;
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+ nn->rx_bar = rx_bar;
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+ nn->is_vf = 0;
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+ nn->stride_rx = stride;
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+ nn->stride_tx = stride;
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+
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+ return nn;
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+}
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+
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+static int
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+nfp_net_pf_init_port_netdev(struct nfp_pf *pf, struct nfp_net *nn,
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+ unsigned int id)
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+{
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+ int err;
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+
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+ /* Get MAC address */
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+ nfp_net_get_mac_addr(nn, pf, id);
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+
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+ /* Get ME clock frequency from ctrl BAR
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+ * XXX for now frequency is hardcoded until we figure out how
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+ * to get the value from nfp-hwinfo into ctrl bar
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+ */
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+ nn->me_freq_mhz = 1200;
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+
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+ err = nfp_net_netdev_init(nn->netdev);
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+ if (err)
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+ return err;
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+
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+ nfp_net_debugfs_port_add(nn, pf->ddir, id);
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+
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+ nfp_net_info(nn);
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+
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+ return 0;
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+}
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+
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+static int
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+nfp_net_pf_alloc_netdevs(struct nfp_pf *pf, void __iomem *ctrl_bar,
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+ void __iomem *tx_bar, void __iomem *rx_bar,
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+ int stride, struct nfp_net_fw_version *fw_ver)
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+{
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+ u32 prev_tx_base, prev_rx_base, tgt_tx_base, tgt_rx_base;
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+ struct nfp_net *nn;
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+ unsigned int i;
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+ int err;
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+
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+ prev_tx_base = readl(ctrl_bar + NFP_NET_CFG_START_TXQ);
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+ prev_rx_base = readl(ctrl_bar + NFP_NET_CFG_START_RXQ);
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+
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+ for (i = 0; i < pf->num_ports; i++) {
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+ tgt_tx_base = readl(ctrl_bar + NFP_NET_CFG_START_TXQ);
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+ tgt_rx_base = readl(ctrl_bar + NFP_NET_CFG_START_RXQ);
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+ tx_bar += (tgt_tx_base - prev_tx_base) * NFP_QCP_QUEUE_ADDR_SZ;
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+ rx_bar += (tgt_rx_base - prev_rx_base) * NFP_QCP_QUEUE_ADDR_SZ;
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+ prev_tx_base = tgt_tx_base;
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+ prev_rx_base = tgt_rx_base;
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+
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+ nn = nfp_net_pf_alloc_port_netdev(pf, ctrl_bar, tx_bar, rx_bar,
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+ stride, fw_ver);
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+ if (IS_ERR(nn)) {
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+ err = PTR_ERR(nn);
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+ goto err_free_prev;
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+ }
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+ list_add_tail(&nn->port_list, &pf->ports);
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+
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+ ctrl_bar += NFP_PF_CSR_SLICE_SIZE;
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+ }
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+
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+ return 0;
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+
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+err_free_prev:
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+ nfp_net_pf_free_netdevs(pf);
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+ return err;
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+}
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+
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+static int
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+nfp_net_pf_spawn_netdevs(struct nfp_pf *pf,
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+ void __iomem *ctrl_bar, void __iomem *tx_bar,
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+ void __iomem *rx_bar, int stride,
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+ struct nfp_net_fw_version *fw_ver)
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+{
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+ unsigned int id, wanted_irqs, num_irqs, ports_left, irqs_left;
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+ struct nfp_net *nn;
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+ int err;
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+
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+ /* Allocate the netdevs and do basic init */
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|
+ err = nfp_net_pf_alloc_netdevs(pf, ctrl_bar, tx_bar, rx_bar,
|
|
|
+ stride, fw_ver);
|
|
|
+ if (err)
|
|
|
+ return err;
|
|
|
+
|
|
|
+ /* Get MSI-X vectors */
|
|
|
+ wanted_irqs = 0;
|
|
|
+ list_for_each_entry(nn, &pf->ports, port_list)
|
|
|
+ wanted_irqs += NFP_NET_NON_Q_VECTORS + nn->num_r_vecs;
|
|
|
+ pf->irq_entries = kcalloc(wanted_irqs, sizeof(*pf->irq_entries),
|
|
|
+ GFP_KERNEL);
|
|
|
+ if (!pf->irq_entries) {
|
|
|
+ err = -ENOMEM;
|
|
|
+ goto err_nn_free;
|
|
|
+ }
|
|
|
+
|
|
|
+ num_irqs = nfp_net_irqs_alloc(pf->pdev, pf->irq_entries,
|
|
|
+ NFP_NET_MIN_PORT_IRQS * pf->num_ports,
|
|
|
+ wanted_irqs);
|
|
|
+ if (!num_irqs) {
|
|
|
+ nn_warn(nn, "Unable to allocate MSI-X Vectors. Exiting\n");
|
|
|
+ err = -ENOMEM;
|
|
|
+ goto err_vec_free;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Distribute IRQs to ports */
|
|
|
+ irqs_left = num_irqs;
|
|
|
+ ports_left = pf->num_ports;
|
|
|
+ list_for_each_entry(nn, &pf->ports, port_list) {
|
|
|
+ unsigned int n;
|
|
|
+
|
|
|
+ n = DIV_ROUND_UP(irqs_left, ports_left);
|
|
|
+ nfp_net_irqs_assign(nn, &pf->irq_entries[num_irqs - irqs_left],
|
|
|
+ n);
|
|
|
+ irqs_left -= n;
|
|
|
+ ports_left--;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Finish netdev init and register */
|
|
|
+ id = 0;
|
|
|
+ list_for_each_entry(nn, &pf->ports, port_list) {
|
|
|
+ err = nfp_net_pf_init_port_netdev(pf, nn, id);
|
|
|
+ if (err)
|
|
|
+ goto err_prev_deinit;
|
|
|
+
|
|
|
+ id++;
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+
|
|
|
+err_prev_deinit:
|
|
|
+ list_for_each_entry_continue_reverse(nn, &pf->ports, port_list) {
|
|
|
+ nfp_net_debugfs_dir_clean(&nn->debugfs_dir);
|
|
|
+ nfp_net_netdev_clean(nn->netdev);
|
|
|
+ }
|
|
|
+ nfp_net_irqs_disable(pf->pdev);
|
|
|
+err_vec_free:
|
|
|
+ kfree(pf->irq_entries);
|
|
|
+err_nn_free:
|
|
|
+ nfp_net_pf_free_netdevs(pf);
|
|
|
+ return err;
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * PCI device functions
|
|
|
+ */
|
|
|
+int nfp_net_pci_probe(struct nfp_pf *pf)
|
|
|
+{
|
|
|
+ u8 __iomem *ctrl_bar, *tx_bar, *rx_bar;
|
|
|
+ u32 total_tx_qcs, total_rx_qcs;
|
|
|
+ struct nfp_net_fw_version fw_ver;
|
|
|
+ u32 tx_area_sz, rx_area_sz;
|
|
|
+ u32 start_q;
|
|
|
+ int stride;
|
|
|
+ int err;
|
|
|
+
|
|
|
+ /* Verify that the board has completed initialization */
|
|
|
+ if (!nfp_is_ready(pf->cpp)) {
|
|
|
+ nfp_err(pf->cpp, "NFP is not ready for NIC operation.\n");
|
|
|
+ return -EINVAL;
|
|
|
+ }
|
|
|
+
|
|
|
+ pf->num_ports = nfp_net_pf_get_num_ports(pf);
|
|
|
+
|
|
|
+ ctrl_bar = nfp_net_pf_map_ctrl_bar(pf);
|
|
|
+ if (!ctrl_bar)
|
|
|
+ return pf->fw_loaded ? -EINVAL : -EPROBE_DEFER;
|
|
|
+
|
|
|
+ nfp_net_get_fw_version(&fw_ver, ctrl_bar);
|
|
|
+ if (fw_ver.resv || fw_ver.class != NFP_NET_CFG_VERSION_CLASS_GENERIC) {
|
|
|
+ nfp_err(pf->cpp, "Unknown Firmware ABI %d.%d.%d.%d\n",
|
|
|
+ fw_ver.resv, fw_ver.class, fw_ver.major, fw_ver.minor);
|
|
|
+ err = -EINVAL;
|
|
|
+ goto err_ctrl_unmap;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Determine stride */
|
|
|
+ if (nfp_net_fw_ver_eq(&fw_ver, 0, 0, 0, 1)) {
|
|
|
+ stride = 2;
|
|
|
+ nfp_warn(pf->cpp, "OBSOLETE Firmware detected - VF isolation not available\n");
|
|
|
+ } else {
|
|
|
+ switch (fw_ver.major) {
|
|
|
+ case 1 ... 4:
|
|
|
+ stride = 4;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ nfp_err(pf->cpp, "Unsupported Firmware ABI %d.%d.%d.%d\n",
|
|
|
+ fw_ver.resv, fw_ver.class,
|
|
|
+ fw_ver.major, fw_ver.minor);
|
|
|
+ err = -EINVAL;
|
|
|
+ goto err_ctrl_unmap;
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Find how many QC structs need to be mapped */
|
|
|
+ total_tx_qcs = nfp_net_pf_total_qcs(pf, ctrl_bar, stride,
|
|
|
+ NFP_NET_CFG_START_TXQ,
|
|
|
+ NFP_NET_CFG_MAX_TXRINGS);
|
|
|
+ total_rx_qcs = nfp_net_pf_total_qcs(pf, ctrl_bar, stride,
|
|
|
+ NFP_NET_CFG_START_RXQ,
|
|
|
+ NFP_NET_CFG_MAX_RXRINGS);
|
|
|
+ if (!total_tx_qcs || !total_rx_qcs) {
|
|
|
+ nfp_err(pf->cpp, "Invalid PF QC configuration [%d,%d]\n",
|
|
|
+ total_tx_qcs, total_rx_qcs);
|
|
|
+ err = -EINVAL;
|
|
|
+ goto err_ctrl_unmap;
|
|
|
+ }
|
|
|
+
|
|
|
+ tx_area_sz = NFP_QCP_QUEUE_ADDR_SZ * total_tx_qcs;
|
|
|
+ rx_area_sz = NFP_QCP_QUEUE_ADDR_SZ * total_rx_qcs;
|
|
|
+
|
|
|
+ /* Map TX queues */
|
|
|
+ start_q = readl(ctrl_bar + NFP_NET_CFG_START_TXQ);
|
|
|
+ tx_bar = nfp_net_map_area(pf->cpp, "net.tx", 0, 0,
|
|
|
+ NFP_PCIE_QUEUE(start_q),
|
|
|
+ tx_area_sz, &pf->tx_area);
|
|
|
+ if (IS_ERR(tx_bar)) {
|
|
|
+ nfp_err(pf->cpp, "Failed to map TX area.\n");
|
|
|
+ err = PTR_ERR(tx_bar);
|
|
|
+ goto err_ctrl_unmap;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Map RX queues */
|
|
|
+ start_q = readl(ctrl_bar + NFP_NET_CFG_START_RXQ);
|
|
|
+ rx_bar = nfp_net_map_area(pf->cpp, "net.rx", 0, 0,
|
|
|
+ NFP_PCIE_QUEUE(start_q),
|
|
|
+ rx_area_sz, &pf->rx_area);
|
|
|
+ if (IS_ERR(rx_bar)) {
|
|
|
+ nfp_err(pf->cpp, "Failed to map RX area.\n");
|
|
|
+ err = PTR_ERR(rx_bar);
|
|
|
+ goto err_unmap_tx;
|
|
|
+ }
|
|
|
+
|
|
|
+ pf->ddir = nfp_net_debugfs_device_add(pf->pdev);
|
|
|
+
|
|
|
+ err = nfp_net_pf_spawn_netdevs(pf, ctrl_bar, tx_bar, rx_bar,
|
|
|
+ stride, &fw_ver);
|
|
|
+ if (err)
|
|
|
+ goto err_clean_ddir;
|
|
|
+
|
|
|
+ return 0;
|
|
|
+
|
|
|
+err_clean_ddir:
|
|
|
+ nfp_net_debugfs_dir_clean(&pf->ddir);
|
|
|
+ nfp_cpp_area_release_free(pf->rx_area);
|
|
|
+err_unmap_tx:
|
|
|
+ nfp_cpp_area_release_free(pf->tx_area);
|
|
|
+err_ctrl_unmap:
|
|
|
+ nfp_cpp_area_release_free(pf->ctrl_area);
|
|
|
+ return err;
|
|
|
+}
|
|
|
+
|
|
|
+void nfp_net_pci_remove(struct nfp_pf *pf)
|
|
|
+{
|
|
|
+ struct nfp_net *nn;
|
|
|
+
|
|
|
+ list_for_each_entry(nn, &pf->ports, port_list) {
|
|
|
+ nfp_net_debugfs_dir_clean(&nn->debugfs_dir);
|
|
|
+
|
|
|
+ nfp_net_netdev_clean(nn->netdev);
|
|
|
+ }
|
|
|
+
|
|
|
+ nfp_net_pf_free_netdevs(pf);
|
|
|
+
|
|
|
+ nfp_net_debugfs_dir_clean(&pf->ddir);
|
|
|
+
|
|
|
+ nfp_net_irqs_disable(pf->pdev);
|
|
|
+ kfree(pf->irq_entries);
|
|
|
+
|
|
|
+ nfp_cpp_area_release_free(pf->rx_area);
|
|
|
+ nfp_cpp_area_release_free(pf->tx_area);
|
|
|
+ nfp_cpp_area_release_free(pf->ctrl_area);
|
|
|
+}
|
Jakub Kicinski