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@@ -302,11 +302,13 @@ static void fsmc_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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* This routine initializes timing parameters related to NAND memory access in
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* FSMC registers
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*/
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-static void fsmc_nand_setup(void __iomem *regs, uint32_t bank,
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- uint32_t busw, struct fsmc_nand_timings *timings)
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+static void fsmc_nand_setup(struct fsmc_nand_data *host,
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+ struct fsmc_nand_timings *timings)
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{
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uint32_t value = FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON;
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uint32_t tclr, tar, thiz, thold, twait, tset;
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+ unsigned int bank = host->bank;
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+ void __iomem *regs = host->regs_va;
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struct fsmc_nand_timings *tims;
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struct fsmc_nand_timings default_timings = {
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.tclr = FSMC_TCLR_1,
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@@ -318,7 +320,7 @@ static void fsmc_nand_setup(void __iomem *regs, uint32_t bank,
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};
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if (timings)
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- tims = timings;
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+ tims = host->dev_timings;
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else
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tims = &default_timings;
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@@ -329,7 +331,7 @@ static void fsmc_nand_setup(void __iomem *regs, uint32_t bank,
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twait = (tims->twait & FSMC_TWAIT_MASK) << FSMC_TWAIT_SHIFT;
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tset = (tims->tset & FSMC_TSET_MASK) << FSMC_TSET_SHIFT;
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- if (busw)
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+ if (host->nand.options & NAND_BUSWIDTH_16)
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writel_relaxed(value | FSMC_DEVWID_16,
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FSMC_NAND_REG(regs, bank, PC));
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else
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@@ -933,9 +935,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
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break;
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}
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- fsmc_nand_setup(host->regs_va, host->bank,
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- nand->options & NAND_BUSWIDTH_16,
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- host->dev_timings);
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+ fsmc_nand_setup(host, host->dev_timings);
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if (AMBA_REV_BITS(host->pid) >= 8) {
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nand->ecc.read_page = fsmc_read_page_hwecc;
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@@ -1073,9 +1073,7 @@ static int fsmc_nand_resume(struct device *dev)
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struct fsmc_nand_data *host = dev_get_drvdata(dev);
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if (host) {
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clk_prepare_enable(host->clk);
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- fsmc_nand_setup(host->regs_va, host->bank,
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- host->nand.options & NAND_BUSWIDTH_16,
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- host->dev_timings);
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+ fsmc_nand_setup(host, host->dev_timings);
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}
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return 0;
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}
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