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@@ -1578,6 +1578,7 @@ static u32 macb_dbw(struct macb *bp)
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static void macb_configure_dma(struct macb *bp)
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{
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u32 dmacfg;
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+ u32 tmp, ncr;
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if (macb_is_gem(bp)) {
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dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);
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@@ -1586,10 +1587,23 @@ static void macb_configure_dma(struct macb *bp)
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dmacfg = GEM_BFINS(FBLDO, bp->dma_burst_length, dmacfg);
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dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L);
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dmacfg &= ~GEM_BIT(ENDIA_PKT);
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- /* Tell the chip to byteswap descriptors on big-endian hosts */
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-#ifdef __BIG_ENDIAN
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- dmacfg |= GEM_BIT(ENDIA_DESC);
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-#endif
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+
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+ /* Find the CPU endianness by using the loopback bit of net_ctrl
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+ * register. save it first. When the CPU is in big endian we
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+ * need to program swaped mode for management descriptor access.
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+ */
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+ ncr = macb_readl(bp, NCR);
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+ __raw_writel(MACB_BIT(LLB), bp->regs + MACB_NCR);
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+ tmp = __raw_readl(bp->regs + MACB_NCR);
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+
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+ if (tmp == MACB_BIT(LLB))
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+ dmacfg &= ~GEM_BIT(ENDIA_DESC);
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+ else
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+ dmacfg |= GEM_BIT(ENDIA_DESC); /* CPU in big endian */
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+
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+ /* Restore net_ctrl */
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+ macb_writel(bp, NCR, ncr);
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+
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if (bp->dev->features & NETIF_F_HW_CSUM)
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dmacfg |= GEM_BIT(TXCOEN);
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else
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