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@@ -2875,13 +2875,24 @@ static void ibx_irq_preinstall(struct drm_device *dev)
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if (HAS_PCH_CPT(dev) || HAS_PCH_LPT(dev))
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I915_WRITE(SERR_INT, 0xffffffff);
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+}
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- /*
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- * SDEIER is also touched by the interrupt handler to work around missed
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- * PCH interrupts. Hence we can't update it after the interrupt handler
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- * is enabled - instead we unconditionally enable all PCH interrupt
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- * sources here, but then only unmask them as needed with SDEIMR.
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- */
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+/*
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+ * SDEIER is also touched by the interrupt handler to work around missed PCH
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+ * interrupts. Hence we can't update it after the interrupt handler is enabled -
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+ * instead we unconditionally enable all PCH interrupt sources here, but then
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+ * only unmask them as needed with SDEIMR.
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+ *
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+ * This function needs to be called before interrupts are enabled.
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+ */
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+static void ibx_irq_pre_postinstall(struct drm_device *dev)
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+{
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+ struct drm_i915_private *dev_priv = dev->dev_private;
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+
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+ if (HAS_PCH_NOP(dev))
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+ return;
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+
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+ WARN_ON(I915_READ(SDEIER) != 0);
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I915_WRITE(SDEIER, 0xffffffff);
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POSTING_READ(SDEIER);
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}
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@@ -3077,6 +3088,8 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
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dev_priv->irq_mask = ~display_mask;
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+ ibx_irq_pre_postinstall(dev);
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+
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GEN5_IRQ_INIT(DE, dev_priv->irq_mask, display_mask | extra_mask);
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gen5_gt_irq_postinstall(dev);
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@@ -3265,6 +3278,8 @@ static int gen8_irq_postinstall(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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+ ibx_irq_pre_postinstall(dev);
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+
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gen8_gt_irq_postinstall(dev_priv);
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gen8_de_irq_postinstall(dev_priv);
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