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@@ -95,6 +95,7 @@ s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
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{
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s32 status;
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u32 ctrl, i;
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+ u32 swfw_mask = hw->phy.phy_semaphore_mask;
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/* Call adapter stop to disable tx/rx and clear interrupts */
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status = hw->mac.ops.stop_adapter(hw);
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@@ -105,10 +106,17 @@ s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
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ixgbe_clear_tx_pending(hw);
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mac_reset_top:
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+ status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);
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+ if (status) {
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+ hw_dbg(hw, "semaphore failed with %d", status);
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+ return IXGBE_ERR_SWFW_SYNC;
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+ }
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+
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ctrl = IXGBE_CTRL_RST;
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ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);
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IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
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IXGBE_WRITE_FLUSH(hw);
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+ hw->mac.ops.release_swfw_sync(hw, swfw_mask);
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usleep_range(1000, 1200);
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/* Poll for reset bit to self-clear indicating reset is complete */
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