|
@@ -0,0 +1,94 @@
|
|
|
+/*
|
|
|
+ * Copyright (c) 2014 MundoReader S.L.
|
|
|
+ * Author: Matthias Brugger <matthias.bgg@gmail.com>
|
|
|
+ *
|
|
|
+ * This program is free software; you can redistribute it and/or modify
|
|
|
+ * it under the terms of the GNU General Public License as published by
|
|
|
+ * the Free Software Foundation; either version 2 of the License, or
|
|
|
+ * (at your option) any later version.
|
|
|
+ *
|
|
|
+ * This program is distributed in the hope that it will be useful,
|
|
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
+ * GNU General Public License for more details.
|
|
|
+ */
|
|
|
+
|
|
|
+#include <dt-bindings/interrupt-controller/irq.h>
|
|
|
+#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
|
+#include "skeleton.dtsi"
|
|
|
+
|
|
|
+/ {
|
|
|
+ compatible = "mediatek,mt6589";
|
|
|
+ interrupt-parent = <&gic>;
|
|
|
+
|
|
|
+ cpus {
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <0>;
|
|
|
+
|
|
|
+ cpu@0 {
|
|
|
+ device_type = "cpu";
|
|
|
+ compatible = "arm,cortex-a7";
|
|
|
+ reg = <0x0>;
|
|
|
+ };
|
|
|
+ cpu@1 {
|
|
|
+ device_type = "cpu";
|
|
|
+ compatible = "arm,cortex-a7";
|
|
|
+ reg = <0x1>;
|
|
|
+ };
|
|
|
+ cpu@2 {
|
|
|
+ device_type = "cpu";
|
|
|
+ compatible = "arm,cortex-a7";
|
|
|
+ reg = <0x2>;
|
|
|
+ };
|
|
|
+ cpu@3 {
|
|
|
+ device_type = "cpu";
|
|
|
+ compatible = "arm,cortex-a7";
|
|
|
+ reg = <0x3>;
|
|
|
+ };
|
|
|
+
|
|
|
+ };
|
|
|
+
|
|
|
+ clocks {
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <1>;
|
|
|
+ compatible = "simple-bus";
|
|
|
+ ranges;
|
|
|
+
|
|
|
+ system_clk: dummy13m {
|
|
|
+ compatible = "fixed-clock";
|
|
|
+ clock-frequency = <13000000>;
|
|
|
+ #clock-cells = <0>;
|
|
|
+ };
|
|
|
+
|
|
|
+ rtc_clk: dummy32k {
|
|
|
+ compatible = "fixed-clock";
|
|
|
+ clock-frequency = <32000>;
|
|
|
+ #clock-cells = <0>;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ soc {
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <1>;
|
|
|
+ compatible = "simple-bus";
|
|
|
+ ranges;
|
|
|
+
|
|
|
+ timer: timer@10008000 {
|
|
|
+ compatible = "mediatek,mt6577-timer";
|
|
|
+ reg = <0x10008000 0x80>;
|
|
|
+ interrupts = <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>;
|
|
|
+ clocks = <&system_clk>, <&rtc_clk>;
|
|
|
+ clock-names = "system-clk", "rtc-clk";
|
|
|
+ };
|
|
|
+
|
|
|
+ gic: interrupt-controller@10212000 {
|
|
|
+ compatible = "arm,cortex-a15-gic";
|
|
|
+ interrupt-controller;
|
|
|
+ #interrupt-cells = <3>;
|
|
|
+ reg = <0x10211000 0x1000>,
|
|
|
+ <0x10212000 0x1000>,
|
|
|
+ <0x10214000 0x2000>,
|
|
|
+ <0x10216000 0x2000>;
|
|
|
+ };
|
|
|
+ };
|
|
|
+};
|