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@@ -575,6 +575,22 @@ static int qpnpint_irq_set_type(struct irq_data *d, unsigned int flow_type)
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return 0;
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}
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+static int qpnpint_get_irqchip_state(struct irq_data *d,
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+ enum irqchip_irq_state which,
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+ bool *state)
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+{
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+ u8 irq = d->hwirq >> 8;
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+ u8 status = 0;
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+
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+ if (which != IRQCHIP_STATE_LINE_LEVEL)
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+ return -EINVAL;
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+
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+ qpnpint_spmi_read(d, QPNPINT_REG_RT_STS, &status, 1);
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+ *state = !!(status & BIT(irq));
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+
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+ return 0;
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+}
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+
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static struct irq_chip pmic_arb_irqchip = {
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.name = "pmic_arb",
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.irq_enable = qpnpint_irq_enable,
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@@ -582,6 +598,7 @@ static struct irq_chip pmic_arb_irqchip = {
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.irq_mask = qpnpint_irq_mask,
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.irq_unmask = qpnpint_irq_unmask,
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.irq_set_type = qpnpint_irq_set_type,
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+ .irq_get_irqchip_state = qpnpint_get_irqchip_state,
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.flags = IRQCHIP_MASK_ON_SUSPEND
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| IRQCHIP_SKIP_SET_WAKE,
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};
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