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@@ -151,6 +151,21 @@
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reg = <0x300000 0x90000>;
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};
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+ blsp1_spi0: spi@07575000 {
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+ compatible = "qcom,spi-qup-v2.2.1";
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+ reg = <0x07575000 0x600>;
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+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
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+ <&gcc GCC_BLSP1_AHB_CLK>;
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+ clock-names = "core", "iface";
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+ pinctrl-names = "default", "sleep";
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+ pinctrl-0 = <&blsp1_spi0_default>;
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+ pinctrl-1 = <&blsp1_spi0_sleep>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "disabled";
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+ };
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+
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blsp2_i2c0: i2c@075b5000 {
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compatible = "qcom,i2c-qup-v2.2.1";
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reg = <0x075b5000 0x1000>;
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