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@@ -514,9 +514,11 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
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amdgpu_device_ip_block_add(adev, &vega10_common_ip_block);
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amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block);
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amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);
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- amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block);
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- if (!amdgpu_sriov_vf(adev))
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- amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
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+ if (adev->asic_type != CHIP_VEGA20) {
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+ amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block);
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+ if (!amdgpu_sriov_vf(adev))
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+ amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
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+ }
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if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
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amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
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#if defined(CONFIG_DRM_AMD_DC)
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@@ -527,8 +529,10 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
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#endif
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amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
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amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
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- amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block);
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- amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block);
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+ if (adev->asic_type != CHIP_VEGA20) {
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+ amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block);
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+ amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block);
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+ }
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break;
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case CHIP_RAVEN:
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amdgpu_device_ip_block_add(adev, &vega10_common_ip_block);
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