|
@@ -140,18 +140,30 @@ static int dra7xx_pcie_establish_link(struct dra7xx_pcie *dra7xx)
|
|
|
return dw_pcie_wait_for_link(pci);
|
|
|
}
|
|
|
|
|
|
-static void dra7xx_pcie_enable_interrupts(struct dra7xx_pcie *dra7xx)
|
|
|
+static void dra7xx_pcie_enable_msi_interrupts(struct dra7xx_pcie *dra7xx)
|
|
|
{
|
|
|
- dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN,
|
|
|
- ~INTERRUPTS);
|
|
|
- dra7xx_pcie_writel(dra7xx,
|
|
|
- PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MAIN, INTERRUPTS);
|
|
|
dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI,
|
|
|
~LEG_EP_INTERRUPTS & ~MSI);
|
|
|
- dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MSI,
|
|
|
+
|
|
|
+ dra7xx_pcie_writel(dra7xx,
|
|
|
+ PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MSI,
|
|
|
MSI | LEG_EP_INTERRUPTS);
|
|
|
}
|
|
|
|
|
|
+static void dra7xx_pcie_enable_wrapper_interrupts(struct dra7xx_pcie *dra7xx)
|
|
|
+{
|
|
|
+ dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN,
|
|
|
+ ~INTERRUPTS);
|
|
|
+ dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MAIN,
|
|
|
+ INTERRUPTS);
|
|
|
+}
|
|
|
+
|
|
|
+static void dra7xx_pcie_enable_interrupts(struct dra7xx_pcie *dra7xx)
|
|
|
+{
|
|
|
+ dra7xx_pcie_enable_wrapper_interrupts(dra7xx);
|
|
|
+ dra7xx_pcie_enable_msi_interrupts(dra7xx);
|
|
|
+}
|
|
|
+
|
|
|
static void dra7xx_pcie_host_init(struct pcie_port *pp)
|
|
|
{
|
|
|
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
|