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@@ -15,6 +15,7 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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+#include <linux/types.h>
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#include <asm/kvm_asm.h>
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#include "hyp.h"
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@@ -149,6 +150,86 @@ static void __hyp_text __vgic_restore_state(struct kvm_vcpu *vcpu)
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__vgic_call_restore_state()(vcpu);
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}
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+static bool __hyp_text __true_value(void)
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+{
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+ return true;
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+}
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+
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+static bool __hyp_text __false_value(void)
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+{
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+ return false;
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+}
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+
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+static hyp_alternate_select(__check_arm_834220,
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+ __false_value, __true_value,
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+ ARM64_WORKAROUND_834220);
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+
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+static bool __hyp_text __translate_far_to_hpfar(u64 far, u64 *hpfar)
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+{
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+ u64 par, tmp;
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+
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+ /*
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+ * Resolve the IPA the hard way using the guest VA.
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+ *
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+ * Stage-1 translation already validated the memory access
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+ * rights. As such, we can use the EL1 translation regime, and
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+ * don't have to distinguish between EL0 and EL1 access.
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+ *
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+ * We do need to save/restore PAR_EL1 though, as we haven't
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+ * saved the guest context yet, and we may return early...
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+ */
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+ par = read_sysreg(par_el1);
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+ asm volatile("at s1e1r, %0" : : "r" (far));
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+ isb();
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+
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+ tmp = read_sysreg(par_el1);
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+ write_sysreg(par, par_el1);
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+
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+ if (unlikely(tmp & 1))
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+ return false; /* Translation failed, back to guest */
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+
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+ /* Convert PAR to HPFAR format */
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+ *hpfar = ((tmp >> 12) & ((1UL << 36) - 1)) << 4;
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+ return true;
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+}
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+
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+static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu)
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+{
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+ u64 esr = read_sysreg_el2(esr);
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+ u8 ec = esr >> ESR_ELx_EC_SHIFT;
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+ u64 hpfar, far;
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+
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+ vcpu->arch.fault.esr_el2 = esr;
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+
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+ if (ec != ESR_ELx_EC_DABT_LOW && ec != ESR_ELx_EC_IABT_LOW)
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+ return true;
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+
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+ far = read_sysreg_el2(far);
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+
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+ /*
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+ * The HPFAR can be invalid if the stage 2 fault did not
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+ * happen during a stage 1 page table walk (the ESR_EL2.S1PTW
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+ * bit is clear) and one of the two following cases are true:
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+ * 1. The fault was due to a permission fault
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+ * 2. The processor carries errata 834220
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+ *
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+ * Therefore, for all non S1PTW faults where we either have a
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+ * permission fault or the errata workaround is enabled, we
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+ * resolve the IPA using the AT instruction.
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+ */
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+ if (!(esr & ESR_ELx_S1PTW) &&
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+ (__check_arm_834220()() || (esr & ESR_ELx_FSC_TYPE) == FSC_PERM)) {
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+ if (!__translate_far_to_hpfar(far, &hpfar))
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+ return false;
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+ } else {
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+ hpfar = read_sysreg(hpfar_el2);
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+ }
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+
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+ vcpu->arch.fault.far_el2 = far;
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+ vcpu->arch.fault.hpfar_el2 = hpfar;
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+ return true;
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+}
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+
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static int __hyp_text __guest_run(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpu_context *host_ctxt;
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@@ -180,9 +261,13 @@ static int __hyp_text __guest_run(struct kvm_vcpu *vcpu)
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__debug_restore_state(vcpu, kern_hyp_va(vcpu->arch.debug_ptr), guest_ctxt);
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/* Jump in the fire! */
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+again:
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exit_code = __guest_enter(vcpu, host_ctxt);
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/* And we're baaack! */
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+ if (exit_code == ARM_EXCEPTION_TRAP && !__populate_fault_info(vcpu))
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+ goto again;
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+
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fp_enabled = __fpsimd_enabled();
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__sysreg_save_guest_state(guest_ctxt);
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