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@@ -97,12 +97,6 @@ extern unsigned int dss_debug;
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#define FLD_MOD(orig, val, start, end) \
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#define FLD_MOD(orig, val, start, end) \
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(((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
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(((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
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-enum omap_burst_size {
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- OMAP_DSS_BURST_4x32 = 0,
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- OMAP_DSS_BURST_8x32 = 1,
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- OMAP_DSS_BURST_16x32 = 2,
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-};
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-
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enum omap_parallel_interface_mode {
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enum omap_parallel_interface_mode {
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OMAP_DSS_PARALLELMODE_BYPASS, /* MIPI DPI */
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OMAP_DSS_PARALLELMODE_BYPASS, /* MIPI DPI */
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OMAP_DSS_PARALLELMODE_RFBI, /* MIPI DBI */
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OMAP_DSS_PARALLELMODE_RFBI, /* MIPI DBI */
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@@ -194,7 +188,7 @@ void dss_uninit_device(struct platform_device *pdev,
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bool dss_use_replication(struct omap_dss_device *dssdev,
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bool dss_use_replication(struct omap_dss_device *dssdev,
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enum omap_color_mode mode);
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enum omap_color_mode mode);
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void default_get_overlay_fifo_thresholds(enum omap_plane plane,
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void default_get_overlay_fifo_thresholds(enum omap_plane plane,
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- u32 fifo_size, enum omap_burst_size *burst_size,
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+ u32 fifo_size, u32 burst_size,
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u32 *fifo_low, u32 *fifo_high);
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u32 *fifo_low, u32 *fifo_high);
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/* manager */
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/* manager */
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@@ -304,7 +298,7 @@ int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk,
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bool enable_hsdiv);
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bool enable_hsdiv);
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void dsi_pll_uninit(struct platform_device *dsidev, bool disconnect_lanes);
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void dsi_pll_uninit(struct platform_device *dsidev, bool disconnect_lanes);
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void dsi_get_overlay_fifo_thresholds(enum omap_plane plane,
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void dsi_get_overlay_fifo_thresholds(enum omap_plane plane,
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- u32 fifo_size, enum omap_burst_size *burst_size,
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+ u32 fifo_size, u32 burst_size,
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u32 *fifo_low, u32 *fifo_high);
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u32 *fifo_low, u32 *fifo_high);
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void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev);
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void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev);
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void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev);
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void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev);
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@@ -398,10 +392,9 @@ void dispc_enable_fifohandcheck(enum omap_channel channel, bool enable);
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void dispc_set_lcd_size(enum omap_channel channel, u16 width, u16 height);
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void dispc_set_lcd_size(enum omap_channel channel, u16 width, u16 height);
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void dispc_set_digit_size(u16 width, u16 height);
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void dispc_set_digit_size(u16 width, u16 height);
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u32 dispc_get_plane_fifo_size(enum omap_plane plane);
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u32 dispc_get_plane_fifo_size(enum omap_plane plane);
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-void dispc_setup_plane_fifo(enum omap_plane plane, u32 low, u32 high);
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+void dispc_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
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void dispc_enable_fifomerge(bool enable);
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void dispc_enable_fifomerge(bool enable);
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-void dispc_set_burst_size(enum omap_plane plane,
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- enum omap_burst_size burst_size);
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+u32 dispc_get_burst_size(enum omap_plane plane);
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void dispc_enable_cpr(enum omap_channel channel, bool enable);
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void dispc_enable_cpr(enum omap_channel channel, bool enable);
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void dispc_set_cpr_coef(enum omap_channel channel,
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void dispc_set_cpr_coef(enum omap_channel channel,
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struct omap_dss_cpr_coefs *coefs);
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struct omap_dss_cpr_coefs *coefs);
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