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@@ -44,7 +44,7 @@
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*
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* CPU Interface:
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*
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- * - kvm_vgic_vcpu_early_init(): initialization of static data that
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+ * - kvm_vgic_vcpu_init(): initialization of static data that
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* doesn't depend on any sizing information or emulation type. No
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* allocation is allowed there.
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*/
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@@ -67,46 +67,6 @@ void kvm_vgic_early_init(struct kvm *kvm)
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spin_lock_init(&dist->lpi_list_lock);
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}
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-/**
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- * kvm_vgic_vcpu_early_init() - Initialize static VGIC VCPU data structures
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- * @vcpu: The VCPU whose VGIC data structures whould be initialized
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- *
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- * Only do initialization, but do not actually enable the VGIC CPU interface
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- * yet.
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- */
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-void kvm_vgic_vcpu_early_init(struct kvm_vcpu *vcpu)
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-{
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- struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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- int i;
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-
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- INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
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- spin_lock_init(&vgic_cpu->ap_list_lock);
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-
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- /*
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- * Enable and configure all SGIs to be edge-triggered and
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- * configure all PPIs as level-triggered.
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- */
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- for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {
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- struct vgic_irq *irq = &vgic_cpu->private_irqs[i];
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-
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- INIT_LIST_HEAD(&irq->ap_list);
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- spin_lock_init(&irq->irq_lock);
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- irq->intid = i;
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- irq->vcpu = NULL;
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- irq->target_vcpu = vcpu;
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- irq->targets = 1U << vcpu->vcpu_id;
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- kref_init(&irq->refcount);
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- if (vgic_irq_is_sgi(i)) {
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- /* SGIs */
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- irq->enabled = 1;
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- irq->config = VGIC_CONFIG_EDGE;
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- } else {
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- /* PPIs */
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- irq->config = VGIC_CONFIG_LEVEL;
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- }
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- }
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-}
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-
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/* CREATION */
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/**
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@@ -224,13 +184,47 @@ static int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis)
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}
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/**
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- * kvm_vgic_vcpu_init() - Register VCPU-specific KVM iodevs
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+ * kvm_vgic_vcpu_init() - Initialize static VGIC VCPU data
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+ * structures and register VCPU-specific KVM iodevs
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+ *
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* @vcpu: pointer to the VCPU being created and initialized
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+ *
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+ * Only do initialization, but do not actually enable the
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+ * VGIC CPU interface
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*/
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int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
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{
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- int ret = 0;
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+ struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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+ int ret = 0;
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+ int i;
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+
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+ INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
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+ spin_lock_init(&vgic_cpu->ap_list_lock);
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+
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+ /*
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+ * Enable and configure all SGIs to be edge-triggered and
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+ * configure all PPIs as level-triggered.
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+ */
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+ for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {
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+ struct vgic_irq *irq = &vgic_cpu->private_irqs[i];
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+
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+ INIT_LIST_HEAD(&irq->ap_list);
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+ spin_lock_init(&irq->irq_lock);
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+ irq->intid = i;
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+ irq->vcpu = NULL;
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+ irq->target_vcpu = vcpu;
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+ irq->targets = 1U << vcpu->vcpu_id;
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+ kref_init(&irq->refcount);
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+ if (vgic_irq_is_sgi(i)) {
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+ /* SGIs */
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+ irq->enabled = 1;
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+ irq->config = VGIC_CONFIG_EDGE;
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+ } else {
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+ /* PPIs */
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+ irq->config = VGIC_CONFIG_LEVEL;
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+ }
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+ }
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if (!irqchip_in_kernel(vcpu->kvm))
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return 0;
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