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@@ -762,8 +762,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
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domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
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if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
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adev->vram_pin_size += amdgpu_bo_size(bo);
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- if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
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- adev->invisible_pin_size += amdgpu_bo_size(bo);
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+ adev->invisible_pin_size += amdgpu_vram_mgr_bo_invisible_size(bo);
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} else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
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adev->gart_pin_size += amdgpu_bo_size(bo);
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}
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@@ -793,8 +792,7 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
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if (bo->tbo.mem.mem_type == TTM_PL_VRAM) {
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adev->vram_pin_size -= amdgpu_bo_size(bo);
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- if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
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- adev->invisible_pin_size -= amdgpu_bo_size(bo);
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+ adev->invisible_pin_size -= amdgpu_vram_mgr_bo_invisible_size(bo);
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} else if (bo->tbo.mem.mem_type == TTM_PL_TT) {
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adev->gart_pin_size -= amdgpu_bo_size(bo);
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}
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