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@@ -697,6 +697,8 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
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}
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}
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*gpu_addr = amdgpu_bo_gpu_offset(bo);
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*gpu_addr = amdgpu_bo_gpu_offset(bo);
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}
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}
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+
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+ domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
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if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
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if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
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adev->vram_pin_size += amdgpu_bo_size(bo);
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adev->vram_pin_size += amdgpu_bo_size(bo);
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if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
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if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
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