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@@ -139,6 +139,8 @@ struct cppi41_dd {
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struct chan_queues td_queue;
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u16 first_completion_queue;
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u16 qmgr_num_pend;
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+ u32 n_chans;
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+ u8 platform;
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struct list_head pending; /* Pending queued transfers */
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spinlock_t lock; /* Lock for pending list */
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@@ -742,13 +744,8 @@ static int cppi41_add_chans(struct device *dev, struct cppi41_dd *cdd)
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{
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struct cppi41_channel *cchan;
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int i;
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- int ret;
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- u32 n_chans;
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+ u32 n_chans = cdd->n_chans;
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- ret = of_property_read_u32(dev->of_node, "#dma-channels",
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- &n_chans);
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- if (ret)
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- return ret;
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/*
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* The channels can only be used as TX or as RX. So we add twice
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* that much dma channels because USB can only do RX or TX.
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@@ -862,7 +859,7 @@ static void init_sched(struct cppi41_dd *cdd)
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word = 0;
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cppi_writel(0, cdd->sched_mem + DMA_SCHED_CTRL);
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- for (ch = 0; ch < 15 * 2; ch += 2) {
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+ for (ch = 0; ch < cdd->n_chans; ch += 2) {
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reg = SCHED_ENTRY0_CHAN(ch);
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reg |= SCHED_ENTRY1_CHAN(ch) | SCHED_ENTRY1_IS_RX;
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@@ -872,7 +869,7 @@ static void init_sched(struct cppi41_dd *cdd)
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cppi_writel(reg, cdd->sched_mem + DMA_SCHED_WORD(word));
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word++;
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}
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- reg = 15 * 2 * 2 - 1;
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+ reg = cdd->n_chans * 2 - 1;
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reg |= DMA_SCHED_CTRL_EN;
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cppi_writel(reg, cdd->sched_mem + DMA_SCHED_CTRL);
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}
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@@ -897,6 +894,7 @@ static int init_cppi41(struct device *dev, struct cppi41_dd *cdd)
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cppi_writel(cdd->td_queue.submit, cdd->ctrl_mem + DMA_TDFDQ);
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init_sched(cdd);
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+
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return 0;
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err_td:
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deinit_cppi41(dev, cdd);
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@@ -1058,6 +1056,11 @@ static int cppi41_dma_probe(struct platform_device *pdev)
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cdd->qmgr_num_pend = glue_info->qmgr_num_pend;
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cdd->first_completion_queue = glue_info->first_completion_queue;
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+ ret = of_property_read_u32(dev->of_node,
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+ "#dma-channels", &cdd->n_chans);
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+ if (ret)
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+ goto err_get_n_chans;
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+
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ret = init_cppi41(dev, cdd);
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if (ret)
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goto err_init_cppi;
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@@ -1100,6 +1103,7 @@ err_chans:
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deinit_cppi41(dev, cdd);
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err_init_cppi:
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pm_runtime_dont_use_autosuspend(dev);
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+err_get_n_chans:
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err_get_sync:
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pm_runtime_put_sync(dev);
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pm_runtime_disable(dev);
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