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@@ -1296,64 +1296,64 @@ static irqreturn_t gen8_gt_irq_handler(struct drm_i915_private *dev_priv,
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irqreturn_t ret = IRQ_NONE;
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if (master_ctl & (GEN8_GT_RCS_IRQ | GEN8_GT_BCS_IRQ)) {
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- u32 tmp = I915_READ_FW(GEN8_GT_IIR(0));
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- if (tmp) {
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- I915_WRITE_FW(GEN8_GT_IIR(0), tmp);
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+ u32 iir = I915_READ_FW(GEN8_GT_IIR(0));
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+ if (iir) {
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+ I915_WRITE_FW(GEN8_GT_IIR(0), iir);
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ret = IRQ_HANDLED;
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- if (tmp & (GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT))
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+ if (iir & (GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT))
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intel_lrc_irq_handler(&dev_priv->ring[RCS]);
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- if (tmp & (GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT))
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+ if (iir & (GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT))
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notify_ring(&dev_priv->ring[RCS]);
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- if (tmp & (GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT))
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+ if (iir & (GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT))
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intel_lrc_irq_handler(&dev_priv->ring[BCS]);
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- if (tmp & (GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT))
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+ if (iir & (GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT))
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notify_ring(&dev_priv->ring[BCS]);
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} else
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DRM_ERROR("The master control interrupt lied (GT0)!\n");
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}
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if (master_ctl & (GEN8_GT_VCS1_IRQ | GEN8_GT_VCS2_IRQ)) {
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- u32 tmp = I915_READ_FW(GEN8_GT_IIR(1));
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- if (tmp) {
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- I915_WRITE_FW(GEN8_GT_IIR(1), tmp);
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+ u32 iir = I915_READ_FW(GEN8_GT_IIR(1));
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+ if (iir) {
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+ I915_WRITE_FW(GEN8_GT_IIR(1), iir);
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ret = IRQ_HANDLED;
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- if (tmp & (GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS1_IRQ_SHIFT))
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+ if (iir & (GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS1_IRQ_SHIFT))
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intel_lrc_irq_handler(&dev_priv->ring[VCS]);
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- if (tmp & (GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT))
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+ if (iir & (GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT))
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notify_ring(&dev_priv->ring[VCS]);
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- if (tmp & (GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS2_IRQ_SHIFT))
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+ if (iir & (GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS2_IRQ_SHIFT))
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intel_lrc_irq_handler(&dev_priv->ring[VCS2]);
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- if (tmp & (GT_RENDER_USER_INTERRUPT << GEN8_VCS2_IRQ_SHIFT))
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+ if (iir & (GT_RENDER_USER_INTERRUPT << GEN8_VCS2_IRQ_SHIFT))
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notify_ring(&dev_priv->ring[VCS2]);
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} else
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DRM_ERROR("The master control interrupt lied (GT1)!\n");
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}
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if (master_ctl & GEN8_GT_VECS_IRQ) {
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- u32 tmp = I915_READ_FW(GEN8_GT_IIR(3));
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- if (tmp) {
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- I915_WRITE_FW(GEN8_GT_IIR(3), tmp);
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+ u32 iir = I915_READ_FW(GEN8_GT_IIR(3));
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+ if (iir) {
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+ I915_WRITE_FW(GEN8_GT_IIR(3), iir);
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ret = IRQ_HANDLED;
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- if (tmp & (GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT))
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+ if (iir & (GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT))
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intel_lrc_irq_handler(&dev_priv->ring[VECS]);
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- if (tmp & (GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT))
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+ if (iir & (GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT))
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notify_ring(&dev_priv->ring[VECS]);
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} else
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DRM_ERROR("The master control interrupt lied (GT3)!\n");
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}
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if (master_ctl & GEN8_GT_PM_IRQ) {
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- u32 tmp = I915_READ_FW(GEN8_GT_IIR(2));
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- if (tmp & dev_priv->pm_rps_events) {
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+ u32 iir = I915_READ_FW(GEN8_GT_IIR(2));
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+ if (iir & dev_priv->pm_rps_events) {
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I915_WRITE_FW(GEN8_GT_IIR(2),
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- tmp & dev_priv->pm_rps_events);
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+ iir & dev_priv->pm_rps_events);
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ret = IRQ_HANDLED;
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- gen6_rps_irq_handler(dev_priv, tmp);
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+ gen6_rps_irq_handler(dev_priv, iir);
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} else
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DRM_ERROR("The master control interrupt lied (PM)!\n");
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}
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