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@@ -145,15 +145,13 @@ int iwl_pcie_rx_stop(struct iwl_trans *trans)
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/*
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/*
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* iwl_pcie_rxq_inc_wr_ptr - Update the write pointer for the RX queue
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* iwl_pcie_rxq_inc_wr_ptr - Update the write pointer for the RX queue
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*/
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*/
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-static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans,
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- struct iwl_rxq *rxq)
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+static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans)
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{
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{
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+ struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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+ struct iwl_rxq *rxq = &trans_pcie->rxq;
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u32 reg;
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u32 reg;
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- spin_lock(&rxq->lock);
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-
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- if (rxq->need_update == 0)
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- goto exit_unlock;
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+ lockdep_assert_held(&rxq->lock);
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/*
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/*
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* explicitly wake up the NIC if:
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* explicitly wake up the NIC if:
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@@ -169,13 +167,27 @@ static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans,
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reg);
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reg);
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iwl_set_bit(trans, CSR_GP_CNTRL,
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iwl_set_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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- goto exit_unlock;
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+ rxq->need_update = true;
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+ return;
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}
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}
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}
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}
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rxq->write_actual = round_down(rxq->write, 8);
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rxq->write_actual = round_down(rxq->write, 8);
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iwl_write32(trans, FH_RSCSR_CHNL0_WPTR, rxq->write_actual);
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iwl_write32(trans, FH_RSCSR_CHNL0_WPTR, rxq->write_actual);
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- rxq->need_update = 0;
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+}
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+
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+static void iwl_pcie_rxq_check_wrptr(struct iwl_trans *trans)
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+{
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+ struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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+ struct iwl_rxq *rxq = &trans_pcie->rxq;
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+
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+ spin_lock(&rxq->lock);
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+
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+ if (!rxq->need_update)
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+ goto exit_unlock;
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+
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+ iwl_pcie_rxq_inc_wr_ptr(trans);
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+ rxq->need_update = false;
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exit_unlock:
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exit_unlock:
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spin_unlock(&rxq->lock);
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spin_unlock(&rxq->lock);
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@@ -236,9 +248,8 @@ static void iwl_pcie_rxq_restock(struct iwl_trans *trans)
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* Increment device's write pointer in multiples of 8. */
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* Increment device's write pointer in multiples of 8. */
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if (rxq->write_actual != (rxq->write & ~0x7)) {
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if (rxq->write_actual != (rxq->write & ~0x7)) {
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spin_lock(&rxq->lock);
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spin_lock(&rxq->lock);
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- rxq->need_update = 1;
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+ iwl_pcie_rxq_inc_wr_ptr(trans);
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spin_unlock(&rxq->lock);
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spin_unlock(&rxq->lock);
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- iwl_pcie_rxq_inc_wr_ptr(trans, rxq);
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}
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}
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}
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}
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@@ -364,13 +375,9 @@ static void iwl_pcie_rxq_free_rbs(struct iwl_trans *trans)
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*/
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*/
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static void iwl_pcie_rx_replenish(struct iwl_trans *trans)
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static void iwl_pcie_rx_replenish(struct iwl_trans *trans)
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{
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{
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- struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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-
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iwl_pcie_rxq_alloc_rbs(trans, GFP_KERNEL);
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iwl_pcie_rxq_alloc_rbs(trans, GFP_KERNEL);
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- spin_lock(&trans_pcie->irq_lock);
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iwl_pcie_rxq_restock(trans);
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iwl_pcie_rxq_restock(trans);
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- spin_unlock(&trans_pcie->irq_lock);
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}
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}
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static void iwl_pcie_rx_replenish_now(struct iwl_trans *trans)
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static void iwl_pcie_rx_replenish_now(struct iwl_trans *trans)
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@@ -525,10 +532,9 @@ int iwl_pcie_rx_init(struct iwl_trans *trans)
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iwl_pcie_rx_hw_init(trans, rxq);
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iwl_pcie_rx_hw_init(trans, rxq);
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- spin_lock(&trans_pcie->irq_lock);
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- rxq->need_update = 1;
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- iwl_pcie_rxq_inc_wr_ptr(trans, rxq);
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- spin_unlock(&trans_pcie->irq_lock);
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+ spin_lock(&rxq->lock);
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+ iwl_pcie_rxq_inc_wr_ptr(trans);
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+ spin_unlock(&rxq->lock);
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return 0;
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return 0;
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}
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}
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@@ -1035,7 +1041,7 @@ irqreturn_t iwl_pcie_irq_handler(int irq, void *dev_id)
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/* uCode wakes up after power-down sleep */
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/* uCode wakes up after power-down sleep */
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if (inta & CSR_INT_BIT_WAKEUP) {
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if (inta & CSR_INT_BIT_WAKEUP) {
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IWL_DEBUG_ISR(trans, "Wakeup interrupt\n");
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IWL_DEBUG_ISR(trans, "Wakeup interrupt\n");
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- iwl_pcie_rxq_inc_wr_ptr(trans, &trans_pcie->rxq);
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+ iwl_pcie_rxq_check_wrptr(trans);
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for (i = 0; i < trans->cfg->base_params->num_of_queues; i++)
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for (i = 0; i < trans->cfg->base_params->num_of_queues; i++)
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iwl_pcie_txq_inc_wr_ptr(trans, &trans_pcie->txq[i]);
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iwl_pcie_txq_inc_wr_ptr(trans, &trans_pcie->txq[i]);
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