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@@ -3267,7 +3267,7 @@ static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
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if (!q_vector->tx.ring && !q_vector->rx.ring)
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return IRQ_HANDLED;
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- napi_schedule(&q_vector->napi);
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+ napi_schedule_irqoff(&q_vector->napi);
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return IRQ_HANDLED;
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}
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@@ -3436,6 +3436,8 @@ static irqreturn_t i40e_intr(int irq, void *data)
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/* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
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if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
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+ struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
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+ struct i40e_q_vector *q_vector = vsi->q_vectors[0];
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/* temporarily disable queue cause for NAPI processing */
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u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
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@@ -3448,7 +3450,7 @@ static irqreturn_t i40e_intr(int irq, void *data)
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wr32(hw, I40E_QINT_TQCTL(0), qval);
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if (!test_bit(__I40E_DOWN, &pf->state))
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- napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
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+ napi_schedule_irqoff(&q_vector->napi);
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}
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if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
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