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@@ -64,6 +64,12 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
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cmpwi cr0,r3,CLOCK_REALTIME
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cmpwi cr1,r3,CLOCK_MONOTONIC
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cror cr0*4+eq,cr0*4+eq,cr1*4+eq
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+
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+ cmpwi cr5,r3,CLOCK_REALTIME_COARSE
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+ cmpwi cr6,r3,CLOCK_MONOTONIC_COARSE
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+ cror cr5*4+eq,cr5*4+eq,cr6*4+eq
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+
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+ cror cr0*4+eq,cr0*4+eq,cr5*4+eq
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bne cr0,99f
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mflr r12 /* r12 saves lr */
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@@ -72,6 +78,7 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
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bl V_LOCAL_FUNC(__get_datapage) /* get data page */
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lis r7,NSEC_PER_SEC@h /* want nanoseconds */
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ori r7,r7,NSEC_PER_SEC@l
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+ beq cr5,70f
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50: bl V_LOCAL_FUNC(__do_get_tspec) /* get time from tb & kernel */
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bne cr1,80f /* if not monotonic, all done */
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@@ -97,19 +104,57 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
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ld r0,CFG_TB_UPDATE_COUNT(r3)
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cmpld cr0,r0,r8 /* check if updated */
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bne- 50b
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+ b 78f
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- /* Add wall->monotonic offset and check for overflow or underflow.
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+ /*
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+ * For coarse clocks we get data directly from the vdso data page, so
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+ * we don't need to call __do_get_tspec, but we still need to do the
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+ * counter trick.
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*/
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- add r4,r4,r6
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- add r5,r5,r9
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- cmpd cr0,r5,r7
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- cmpdi cr1,r5,0
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- blt 1f
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- subf r5,r7,r5
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- addi r4,r4,1
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-1: bge cr1,80f
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- addi r4,r4,-1
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- add r5,r5,r7
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+70: ld r8,CFG_TB_UPDATE_COUNT(r3)
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+ andi. r0,r8,1 /* pending update ? loop */
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+ bne- 70b
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+ add r3,r3,r0 /* r0 is already 0 */
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+
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+ /*
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+ * CLOCK_REALTIME_COARSE, below values are needed for MONOTONIC_COARSE
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+ * too
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+ */
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+ ld r4,STAMP_XTIME+TSPC64_TV_SEC(r3)
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+ ld r5,STAMP_XTIME+TSPC64_TV_NSEC(r3)
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+ bne cr6,75f
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+
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+ /* CLOCK_MONOTONIC_COARSE */
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+ lwa r6,WTOM_CLOCK_SEC(r3)
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+ lwa r9,WTOM_CLOCK_NSEC(r3)
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+
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+ /* check if counter has updated */
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+ or r0,r6,r9
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+75: or r0,r0,r4
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+ or r0,r0,r5
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+ xor r0,r0,r0
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+ add r3,r3,r0
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+ ld r0,CFG_TB_UPDATE_COUNT(r3)
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+ cmpld cr0,r0,r8 /* check if updated */
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+ bne- 70b
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+
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+ /* Counter has not updated, so continue calculating proper values for
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+ * sec and nsec if monotonic coarse, or just return with the proper
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+ * values for realtime.
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+ */
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+ bne cr6,80f
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+
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+ /* Add wall->monotonic offset and check for overflow or underflow */
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+78: add r4,r4,r6
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+ add r5,r5,r9
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+ cmpd cr0,r5,r7
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+ cmpdi cr1,r5,0
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+ blt 79f
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+ subf r5,r7,r5
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+ addi r4,r4,1
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+79: bge cr1,80f
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+ addi r4,r4,-1
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+ add r5,r5,r7
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80: std r4,TSPC64_TV_SEC(r11)
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std r5,TSPC64_TV_NSEC(r11)
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