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@@ -106,6 +106,31 @@
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clock-frequency = <0>;
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};
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+ flash@30000000 {
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+ compatible = "arm,versatile-flash", "cfi-flash";
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+ reg = <0x30000000 0x4000000>;
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+ bank-width = <4>;
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+ };
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+
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+ fpga_flash@38000000 {
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+ compatible = "arm,versatile-flash", "cfi-flash";
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+ reg = <0x38000000 0x800000>;
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+ bank-width = <4>;
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+ };
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+
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+ /*
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+ * The "secure flash" contains things like the boot
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+ * monitor so we don't want people to accidentally
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+ * screw this up. Mark the device tree node disabled
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+ * by default.
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+ */
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+ secflash@3c000000 {
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+ compatible = "arm,versatile-flash", "cfi-flash";
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+ reg = <0x3c000000 0x4000000>;
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+ bank-width = <4>;
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+ status = "disabled";
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+ };
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+
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -297,6 +322,13 @@
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clocks = <&uartclk>, <&pclk>;
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clock-names = "uartclk", "apb_pclk";
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};
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+
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+ /* Direct-mapped development chip ROM */
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+ pb1176_rom@10200000 {
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+ compatible = "direct-mapped";
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+ reg = <0x10200000 0x4000>;
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+ bank-width = <1>;
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+ };
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};
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/* These peripherals are inside the FPGA rather than the DevChip */
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