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@@ -8,7 +8,7 @@ static struct amd_decoder_ops *fam_ops;
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static u8 xec_mask = 0xf;
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static u8 xec_mask = 0xf;
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static bool report_gart_errors;
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static bool report_gart_errors;
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-static void (*nb_bus_decoder)(int node_id, struct mce *m);
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+static void (*decode_dram_ecc)(int node_id, struct mce *m);
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void amd_report_gart_errors(bool v)
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void amd_report_gart_errors(bool v)
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{
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{
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@@ -18,16 +18,16 @@ EXPORT_SYMBOL_GPL(amd_report_gart_errors);
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void amd_register_ecc_decoder(void (*f)(int, struct mce *))
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void amd_register_ecc_decoder(void (*f)(int, struct mce *))
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{
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{
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- nb_bus_decoder = f;
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+ decode_dram_ecc = f;
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}
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}
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EXPORT_SYMBOL_GPL(amd_register_ecc_decoder);
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EXPORT_SYMBOL_GPL(amd_register_ecc_decoder);
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void amd_unregister_ecc_decoder(void (*f)(int, struct mce *))
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void amd_unregister_ecc_decoder(void (*f)(int, struct mce *))
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{
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{
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- if (nb_bus_decoder) {
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- WARN_ON(nb_bus_decoder != f);
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+ if (decode_dram_ecc) {
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+ WARN_ON(decode_dram_ecc != f);
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- nb_bus_decoder = NULL;
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+ decode_dram_ecc = NULL;
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}
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}
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}
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}
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EXPORT_SYMBOL_GPL(amd_unregister_ecc_decoder);
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EXPORT_SYMBOL_GPL(amd_unregister_ecc_decoder);
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@@ -763,8 +763,8 @@ static void decode_mc4_mce(struct mce *m)
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pr_cont("%s.\n", mc4_mce_desc[xec]);
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pr_cont("%s.\n", mc4_mce_desc[xec]);
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- if (nb_bus_decoder)
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- nb_bus_decoder(node_id, m);
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+ if (decode_dram_ecc)
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+ decode_dram_ecc(node_id, m);
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return;
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return;
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}
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}
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break;
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break;
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@@ -877,6 +877,13 @@ static void decode_smca_errors(struct mce *m)
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pr_emerg(HW_ERR "%s Error: ", ip_name);
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pr_emerg(HW_ERR "%s Error: ", ip_name);
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pr_cont("%s.\n", smca_mce_descs[bank_type].descs[xec]);
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pr_cont("%s.\n", smca_mce_descs[bank_type].descs[xec]);
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}
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}
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+
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+ /*
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+ * amd_get_nb_id() returns the last level cache id.
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+ * The last level cache on Fam17h is 1 level below the node.
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+ */
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+ if (bank_type == SMCA_UMC && xec == 0 && decode_dram_ecc)
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+ decode_dram_ecc(amd_get_nb_id(m->extcpu) >> 1, m);
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}
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}
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static inline void amd_decode_err_code(u16 ec)
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static inline void amd_decode_err_code(u16 ec)
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