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@@ -369,6 +369,7 @@ static int xilinx_pcie_intx_map(struct irq_domain *domain, unsigned int irq,
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/* INTx IRQ Domain operations */
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/* INTx IRQ Domain operations */
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static const struct irq_domain_ops intx_domain_ops = {
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static const struct irq_domain_ops intx_domain_ops = {
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.map = xilinx_pcie_intx_map,
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.map = xilinx_pcie_intx_map,
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+ .xlate = pci_irqd_intx_xlate,
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};
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};
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/* PCIe HW Functions */
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/* PCIe HW Functions */
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@@ -440,8 +441,8 @@ static irqreturn_t xilinx_pcie_intr_handler(int irq, void *data)
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XILINX_PCIE_REG_RPIFR1);
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XILINX_PCIE_REG_RPIFR1);
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/* Handle INTx Interrupt */
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/* Handle INTx Interrupt */
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- val = ((val & XILINX_PCIE_RPIFR1_INTR_MASK) >>
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- XILINX_PCIE_RPIFR1_INTR_SHIFT) + 1;
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+ val = (val & XILINX_PCIE_RPIFR1_INTR_MASK) >>
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+ XILINX_PCIE_RPIFR1_INTR_SHIFT;
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generic_handle_irq(irq_find_mapping(port->leg_domain,
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generic_handle_irq(irq_find_mapping(port->leg_domain,
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val));
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val));
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}
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}
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@@ -524,7 +525,7 @@ static int xilinx_pcie_init_irq_domain(struct xilinx_pcie_port *port)
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return -ENODEV;
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return -ENODEV;
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}
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}
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- port->leg_domain = irq_domain_add_linear(pcie_intc_node, 4,
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+ port->leg_domain = irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX,
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&intx_domain_ops,
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&intx_domain_ops,
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port);
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port);
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if (!port->leg_domain) {
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if (!port->leg_domain) {
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