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@@ -271,7 +271,7 @@ int arch_decode_instruction(struct elf *elf, struct section *sec,
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case 0x8d:
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case 0x8d:
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if (rex == 0x48 && modrm == 0x65) {
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if (rex == 0x48 && modrm == 0x65) {
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- /* lea -disp(%rbp), %rsp */
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+ /* lea disp(%rbp), %rsp */
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*type = INSN_STACK;
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*type = INSN_STACK;
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op->src.type = OP_SRC_ADD;
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op->src.type = OP_SRC_ADD;
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op->src.reg = CFI_BP;
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op->src.reg = CFI_BP;
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@@ -281,6 +281,30 @@ int arch_decode_instruction(struct elf *elf, struct section *sec,
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break;
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break;
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}
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}
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+ if (rex == 0x48 && (modrm == 0xa4 || modrm == 0x64) &&
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+ sib == 0x24) {
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+
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+ /* lea disp(%rsp), %rsp */
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+ *type = INSN_STACK;
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+ op->src.type = OP_SRC_ADD;
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+ op->src.reg = CFI_SP;
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+ op->src.offset = insn.displacement.value;
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+ op->dest.type = OP_DEST_REG;
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+ op->dest.reg = CFI_SP;
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+ break;
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+ }
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+
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+ if (rex == 0x48 && modrm == 0x2c && sib == 0x24) {
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+
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+ /* lea (%rsp), %rbp */
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+ *type = INSN_STACK;
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+ op->src.type = OP_SRC_REG;
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+ op->src.reg = CFI_SP;
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+ op->dest.type = OP_DEST_REG;
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+ op->dest.reg = CFI_BP;
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+ break;
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+ }
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+
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if (rex == 0x4c && modrm == 0x54 && sib == 0x24 &&
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if (rex == 0x4c && modrm == 0x54 && sib == 0x24 &&
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insn.displacement.value == 8) {
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insn.displacement.value == 8) {
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