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@@ -0,0 +1,75 @@
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+* Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)
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+
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+
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+Required properties:
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+- compatible: Should be "snps,dwc-qos-ethernet-4.10"
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+- reg: Address and length of the register set for the device
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+- clocks: Phandles to the reference clock and the bus clock
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+- clock-names: Should be "phy_ref_clk" for the reference clock and "apb_pclk"
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+ for the bus clock.
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+- interrupt-parent: Should be the phandle for the interrupt controller
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+ that services interrupts for this device
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+- interrupts: Should contain the core's combined interrupt signal
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+- phy-mode: See ethernet.txt file in the same directory
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+
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+Optional properties:
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+- dma-coherent: Present if dma operations are coherent
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+- mac-address: See ethernet.txt in the same directory
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+- local-mac-address: See ethernet.txt in the same directory
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+- snps,en-lpi: If present it enables use of the AXI low-power interface
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+- snps,write-requests: Number of write requests that the AXI port can issue.
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+ It depends on the SoC configuration.
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+- snps,read-requests: Number of read requests that the AXI port can issue.
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+ It depends on the SoC configuration.
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+- snps,burst-map: Bitmap of allowed AXI burst lengts, with the LSB
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+ representing 4, then 8 etc.
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+- snps,txpbl: DMA Programmable burst length for the TX DMA
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+- snps,rxpbl: DMA Programmable burst length for the RX DMA
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+- snps,en-tx-lpi-clockgating: Enable gating of the MAC TX clock during
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+ TX low-power mode.
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+- phy-handle: See ethernet.txt file in the same directory
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+- mdio device tree subnode: When the GMAC has a phy connected to its local
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+ mdio, there must be device tree subnode with the following
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+ required properties:
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+ - compatible: Must be "snps,dwc-qos-ethernet-mdio".
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+ - #address-cells: Must be <1>.
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+ - #size-cells: Must be <0>.
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+
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+ For each phy on the mdio bus, there must be a node with the following
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+ fields:
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+
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+ - reg: phy id used to communicate to phy.
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+ - device_type: Must be "ethernet-phy".
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+ - fixed-mode device tree subnode: see fixed-link.txt in the same directory
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+
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+Examples:
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+ethernet2@40010000 {
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+ clock-names = "phy_ref_clk", "apb_pclk";
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+ clocks = <&clkc 17>, <&clkc 15>;
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+ compatible = "snps,dwc-qos-ethernet-4.10";
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+ interrupt-parent = <&intc>;
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+ interrupts = <0x0 0x1e 0x4>;
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+ reg = <0x40010000 0x4000>;
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+ phy-handle = <&phy2>;
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+ phy-mode = "gmii";
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+
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+ snps,en-tx-lpi-clockgating;
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+ snps,en-lpi;
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+ snps,write-requests = <2>;
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+ snps,read-requests = <16>;
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+ snps,burst-map = <0x7>;
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+ snps,txpbl = <8>;
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+ snps,rxpbl = <2>;
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+
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+ dma-coherent;
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+
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+ mdio {
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+ #address-cells = <0x1>;
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+ #size-cells = <0x0>;
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+ phy2: phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ device_type = "ethernet-phy";
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+ reg = <0x1>;
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+ };
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+ };
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+};
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