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@@ -378,6 +378,8 @@ struct ixgbe_thermal_sensor_data {
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#define IXGBE_SPOOF_MACAS_MASK 0xFF
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#define IXGBE_SPOOF_VLANAS_MASK 0xFF00
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#define IXGBE_SPOOF_VLANAS_SHIFT 8
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+#define IXGBE_SPOOF_ETHERTYPEAS 0xFF000000
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+#define IXGBE_SPOOF_ETHERTYPEAS_SHIFT 16
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#define IXGBE_PFVFSPOOF_REG_COUNT 8
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#define IXGBE_DCA_TXCTRL(_i) (0x07200 + ((_i) * 4)) /* 16 of these (0-15) */
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@@ -1541,6 +1543,7 @@ enum {
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#define IXGBE_MAX_ETQF_FILTERS 8
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#define IXGBE_ETQF_FCOE 0x08000000 /* bit 27 */
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#define IXGBE_ETQF_BCN 0x10000000 /* bit 28 */
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+#define IXGBE_ETQF_TX_ANTISPOOF 0x20000000 /* bit 29 */
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#define IXGBE_ETQF_1588 0x40000000 /* bit 30 */
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#define IXGBE_ETQF_FILTER_EN 0x80000000 /* bit 31 */
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#define IXGBE_ETQF_POOL_ENABLE (1 << 26) /* bit 26 */
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@@ -1566,6 +1569,9 @@ enum {
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#define IXGBE_ETQF_FILTER_FCOE 2
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#define IXGBE_ETQF_FILTER_1588 3
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#define IXGBE_ETQF_FILTER_FIP 4
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+#define IXGBE_ETQF_FILTER_LLDP 5
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+#define IXGBE_ETQF_FILTER_LACP 6
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+
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/* VLAN Control Bit Masks */
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#define IXGBE_VLNCTRL_VET 0x0000FFFF /* bits 0-15 */
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#define IXGBE_VLNCTRL_CFI 0x10000000 /* bit 28 */
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@@ -3061,6 +3067,7 @@ struct ixgbe_mac_operations {
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s32 (*set_fw_drv_ver)(struct ixgbe_hw *, u8, u8, u8, u8);
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s32 (*get_thermal_sensor_data)(struct ixgbe_hw *);
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s32 (*init_thermal_sensor_thresh)(struct ixgbe_hw *hw);
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+ void (*set_ethertype_anti_spoofing)(struct ixgbe_hw *, bool, int);
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/* DMA Coalescing */
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s32 (*dmac_config)(struct ixgbe_hw *hw);
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