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@@ -550,6 +550,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
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}
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case AMDGPU_INFO_DEV_INFO: {
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struct drm_amdgpu_info_device dev_info = {};
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+ uint64_t vm_size;
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dev_info.device_id = dev->pdev->device;
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dev_info.chip_rev = adev->rev_id;
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@@ -577,10 +578,17 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
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dev_info.ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
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if (amdgpu_sriov_vf(adev))
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dev_info.ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
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+
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+ vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
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dev_info.virtual_address_offset = AMDGPU_VA_RESERVED_SIZE;
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dev_info.virtual_address_max =
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- min(adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE,
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- AMDGPU_VA_HOLE_START);
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+ min(vm_size, AMDGPU_VA_HOLE_START);
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+
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+ vm_size -= AMDGPU_VA_RESERVED_SIZE;
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+ if (vm_size > AMDGPU_VA_HOLE_START) {
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+ dev_info.high_va_offset = AMDGPU_VA_HOLE_END;
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+ dev_info.high_va_max = AMDGPU_VA_HOLE_END | vm_size;
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+ }
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dev_info.virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
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dev_info.pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE;
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dev_info.gart_page_size = AMDGPU_GPU_PAGE_SIZE;
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