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@@ -13313,35 +13313,6 @@ static int calc_watermark_data(struct drm_atomic_state *state)
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{
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struct drm_device *dev = state->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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- struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
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- struct drm_crtc *crtc;
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- struct drm_crtc_state *cstate;
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- struct drm_plane *plane;
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- struct drm_plane_state *pstate;
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-
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- /*
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- * Calculate watermark configuration details now that derived
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- * plane/crtc state is all properly updated.
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- */
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- drm_for_each_crtc(crtc, dev) {
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- cstate = drm_atomic_get_existing_crtc_state(state, crtc) ?:
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- crtc->state;
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-
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- if (cstate->active)
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- intel_state->wm_config.num_pipes_active++;
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- }
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- drm_for_each_legacy_plane(plane, dev) {
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- pstate = drm_atomic_get_existing_plane_state(state, plane) ?:
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- plane->state;
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-
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- if (!to_intel_plane_state(pstate)->visible)
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- continue;
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-
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- intel_state->wm_config.sprites_enabled = true;
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- if (pstate->crtc_w != pstate->src_w >> 16 ||
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- pstate->crtc_h != pstate->src_h >> 16)
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- intel_state->wm_config.sprites_scaled = true;
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- }
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/* Is there platform-specific watermark information to calculate? */
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if (dev_priv->display.compute_global_watermarks)
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@@ -13598,7 +13569,6 @@ static int intel_atomic_commit(struct drm_device *dev,
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}
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drm_atomic_helper_swap_state(dev, state);
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- dev_priv->wm.config = intel_state->wm_config;
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dev_priv->wm.distrust_bios_wm = false;
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dev_priv->wm.skl_results = intel_state->wm_results;
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intel_shared_dpll_commit(state);
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@@ -15367,7 +15337,6 @@ retry:
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}
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/* Write calculated watermark values back */
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- to_i915(dev)->wm.config = to_intel_atomic_state(state)->wm_config;
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for_each_crtc_in_state(state, crtc, cstate, i) {
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struct intel_crtc_state *cs = to_intel_crtc_state(cstate);
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