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@@ -52,7 +52,7 @@ static int ath10k_pci_post_rx_pipe(struct ath10k_pci_pipe *pipe_info,
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int num);
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static void ath10k_pci_rx_pipe_cleanup(struct ath10k_pci_pipe *pipe_info);
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static void ath10k_pci_stop_ce(struct ath10k *ar);
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-static void ath10k_pci_device_reset(struct ath10k *ar);
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+static int ath10k_pci_device_reset(struct ath10k *ar);
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static int ath10k_pci_wait_for_target_init(struct ath10k *ar);
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static int ath10k_pci_start_intr(struct ath10k *ar);
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static void ath10k_pci_stop_intr(struct ath10k *ar);
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@@ -526,21 +526,6 @@ static bool ath10k_pci_target_is_awake(struct ath10k *ar)
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return (RTC_STATE_V_GET(val) == RTC_STATE_V_ON);
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}
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-static int ath10k_pci_wait(struct ath10k *ar)
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-{
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- int n = 100;
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-
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- while (n-- && !ath10k_pci_target_is_awake(ar))
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- msleep(10);
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-
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- if (n < 0) {
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- ath10k_warn("Unable to wakeup target\n");
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- return -ETIMEDOUT;
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- }
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-
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- return 0;
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-}
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-
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int ath10k_do_pci_wake(struct ath10k *ar)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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@@ -1855,7 +1840,11 @@ static int ath10k_pci_hif_power_up(struct ath10k *ar)
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* is in an unexpected state. We try to catch that here in order to
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* reset the Target and retry the probe.
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*/
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- ath10k_pci_device_reset(ar);
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+ ret = ath10k_pci_device_reset(ar);
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+ if (ret) {
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+ ath10k_err("failed to reset target: %d\n", ret);
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+ goto err_irq;
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+ }
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ret = ath10k_pci_wait_for_target_init(ar);
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if (ret)
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@@ -2156,19 +2145,10 @@ static int ath10k_pci_start_intr_legacy(struct ath10k *ar)
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if (ret < 0)
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return ret;
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- /*
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- * Make sure to wake the Target before enabling Legacy
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- * Interrupt.
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- */
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- iowrite32(PCIE_SOC_WAKE_V_MASK,
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- ar_pci->mem + PCIE_LOCAL_BASE_ADDRESS +
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- PCIE_SOC_WAKE_ADDRESS);
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-
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- ret = ath10k_pci_wait(ar);
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+ ret = ath10k_do_pci_wake(ar);
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if (ret) {
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- ath10k_warn("Failed to enable legacy interrupt, target did not wake up: %d\n",
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- ret);
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free_irq(ar_pci->pdev->irq, ar);
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+ ath10k_err("failed to wake up target: %d\n", ret);
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return ret;
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}
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@@ -2184,10 +2164,8 @@ static int ath10k_pci_start_intr_legacy(struct ath10k *ar)
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PCIE_INTR_CE_MASK_ALL,
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ar_pci->mem + (SOC_CORE_BASE_ADDRESS |
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PCIE_INTR_ENABLE_ADDRESS));
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- iowrite32(PCIE_SOC_WAKE_RESET,
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- ar_pci->mem + PCIE_LOCAL_BASE_ADDRESS +
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- PCIE_SOC_WAKE_ADDRESS);
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+ ath10k_do_pci_sleep(ar);
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ath10k_info("legacy interrupt handling\n");
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return 0;
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}
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@@ -2263,15 +2241,9 @@ static int ath10k_pci_wait_for_target_init(struct ath10k *ar)
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int wait_limit = 300; /* 3 sec */
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int ret;
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- /* Wait for Target to finish initialization before we proceed. */
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- iowrite32(PCIE_SOC_WAKE_V_MASK,
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- ar_pci->mem + PCIE_LOCAL_BASE_ADDRESS +
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- PCIE_SOC_WAKE_ADDRESS);
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-
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- ret = ath10k_pci_wait(ar);
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+ ret = ath10k_do_pci_wake(ar);
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if (ret) {
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- ath10k_warn("Failed to reset target, target did not wake up: %d\n",
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- ret);
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+ ath10k_err("failed to wake up target: %d\n", ret);
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return ret;
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}
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@@ -2288,31 +2260,26 @@ static int ath10k_pci_wait_for_target_init(struct ath10k *ar)
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}
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if (wait_limit < 0) {
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- ath10k_err("Target stalled\n");
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- iowrite32(PCIE_SOC_WAKE_RESET,
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- ar_pci->mem + PCIE_LOCAL_BASE_ADDRESS +
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- PCIE_SOC_WAKE_ADDRESS);
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- return -EIO;
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+ ath10k_err("target stalled\n");
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+ ret = -EIO;
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+ goto out;
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}
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- iowrite32(PCIE_SOC_WAKE_RESET,
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- ar_pci->mem + PCIE_LOCAL_BASE_ADDRESS +
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- PCIE_SOC_WAKE_ADDRESS);
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-
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- return 0;
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+out:
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+ ath10k_do_pci_sleep(ar);
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+ return ret;
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}
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-static void ath10k_pci_device_reset(struct ath10k *ar)
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+static int ath10k_pci_device_reset(struct ath10k *ar)
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{
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- int i;
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+ int i, ret;
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u32 val;
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- ath10k_pci_reg_write32(ar, PCIE_SOC_WAKE_ADDRESS,
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- PCIE_SOC_WAKE_V_MASK);
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- for (i = 0; i < ATH_PCI_RESET_WAIT_MAX; i++) {
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- if (ath10k_pci_target_is_awake(ar))
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- break;
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- msleep(1);
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+ ret = ath10k_do_pci_wake(ar);
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+ if (ret) {
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+ ath10k_err("failed to wake up target: %d\n",
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+ ret);
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+ return ret;
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}
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/* Put Target, including PCIe, into RESET. */
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@@ -2338,7 +2305,8 @@ static void ath10k_pci_device_reset(struct ath10k *ar)
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msleep(1);
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}
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- ath10k_pci_reg_write32(ar, PCIE_SOC_WAKE_ADDRESS, PCIE_SOC_WAKE_RESET);
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+ ath10k_do_pci_sleep(ar);
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+ return 0;
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}
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static void ath10k_pci_dump_features(struct ath10k_pci *ar_pci)
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