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@@ -570,37 +570,25 @@ static void dcn1_update_clocks(struct dccg *dccg,
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bool send_request_to_increase = false;
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bool send_request_to_increase = false;
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bool send_request_to_lower = false;
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bool send_request_to_lower = false;
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+ if (new_clocks->phyclk_khz)
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+ smu_req.display_count = 1;
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+ else
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+ smu_req.display_count = 0;
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+
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if (new_clocks->dispclk_khz > dccg->clks.dispclk_khz
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if (new_clocks->dispclk_khz > dccg->clks.dispclk_khz
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|| new_clocks->phyclk_khz > dccg->clks.phyclk_khz
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|| new_clocks->phyclk_khz > dccg->clks.phyclk_khz
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|| new_clocks->fclk_khz > dccg->clks.fclk_khz
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|| new_clocks->fclk_khz > dccg->clks.fclk_khz
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|| new_clocks->dcfclk_khz > dccg->clks.dcfclk_khz)
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|| new_clocks->dcfclk_khz > dccg->clks.dcfclk_khz)
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send_request_to_increase = true;
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send_request_to_increase = true;
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- /* make sure dcf clk is before dpp clk to
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- * make sure we have enough voltage to run dpp clk
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- */
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- if (send_request_to_increase) {
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- /*use dcfclk to request voltage*/
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- clock_voltage_req.clk_type = DM_PP_CLOCK_TYPE_DCFCLK;
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- clock_voltage_req.clocks_in_khz = dcn_find_dcfclk_suits_all(dc, new_clocks);
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- dm_pp_apply_clock_for_voltage_request(dccg->ctx, &clock_voltage_req);
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- }
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-
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- if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, dccg->clks.dispclk_khz)) {
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- dcn1_ramp_up_dispclk_with_dpp(dccg, new_clocks);
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- dccg->clks.dispclk_khz = new_clocks->dispclk_khz;
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-
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- send_request_to_lower = true;
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- }
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-
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if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, dccg->clks.phyclk_khz)) {
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if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, dccg->clks.phyclk_khz)) {
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- clock_voltage_req.clocks_in_khz = new_clocks->phyclk_khz;
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+ dccg->clks.phyclk_khz = new_clocks->phyclk_khz;
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send_request_to_lower = true;
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send_request_to_lower = true;
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}
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}
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if (should_set_clock(safe_to_lower, new_clocks->fclk_khz, dccg->clks.fclk_khz)) {
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if (should_set_clock(safe_to_lower, new_clocks->fclk_khz, dccg->clks.fclk_khz)) {
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- dccg->clks.phyclk_khz = new_clocks->fclk_khz;
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+ dccg->clks.fclk_khz = new_clocks->fclk_khz;
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clock_voltage_req.clk_type = DM_PP_CLOCK_TYPE_FCLK;
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clock_voltage_req.clk_type = DM_PP_CLOCK_TYPE_FCLK;
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clock_voltage_req.clocks_in_khz = new_clocks->fclk_khz;
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clock_voltage_req.clocks_in_khz = new_clocks->fclk_khz;
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smu_req.hard_min_fclk_khz = new_clocks->fclk_khz;
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smu_req.hard_min_fclk_khz = new_clocks->fclk_khz;
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@@ -610,7 +598,7 @@ static void dcn1_update_clocks(struct dccg *dccg,
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}
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}
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if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, dccg->clks.dcfclk_khz)) {
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if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, dccg->clks.dcfclk_khz)) {
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- dccg->clks.phyclk_khz = new_clocks->dcfclk_khz;
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+ dccg->clks.dcfclk_khz = new_clocks->dcfclk_khz;
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smu_req.hard_min_dcefclk_khz = new_clocks->dcfclk_khz;
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smu_req.hard_min_dcefclk_khz = new_clocks->dcfclk_khz;
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send_request_to_lower = true;
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send_request_to_lower = true;
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@@ -620,22 +608,39 @@ static void dcn1_update_clocks(struct dccg *dccg,
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new_clocks->dcfclk_deep_sleep_khz, dccg->clks.dcfclk_deep_sleep_khz)) {
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new_clocks->dcfclk_deep_sleep_khz, dccg->clks.dcfclk_deep_sleep_khz)) {
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dccg->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz;
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dccg->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz;
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smu_req.min_deep_sleep_dcefclk_mhz = new_clocks->dcfclk_deep_sleep_khz;
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smu_req.min_deep_sleep_dcefclk_mhz = new_clocks->dcfclk_deep_sleep_khz;
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+
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+ send_request_to_lower = true;
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}
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}
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- if (!send_request_to_increase && send_request_to_lower) {
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+ /* make sure dcf clk is before dpp clk to
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+ * make sure we have enough voltage to run dpp clk
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+ */
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+ if (send_request_to_increase) {
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/*use dcfclk to request voltage*/
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/*use dcfclk to request voltage*/
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clock_voltage_req.clk_type = DM_PP_CLOCK_TYPE_DCFCLK;
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clock_voltage_req.clk_type = DM_PP_CLOCK_TYPE_DCFCLK;
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clock_voltage_req.clocks_in_khz = dcn_find_dcfclk_suits_all(dc, new_clocks);
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clock_voltage_req.clocks_in_khz = dcn_find_dcfclk_suits_all(dc, new_clocks);
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dm_pp_apply_clock_for_voltage_request(dccg->ctx, &clock_voltage_req);
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dm_pp_apply_clock_for_voltage_request(dccg->ctx, &clock_voltage_req);
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+ if (pp_smu->set_display_requirement)
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+ pp_smu->set_display_requirement(&pp_smu->pp_smu, &smu_req);
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}
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}
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- if (new_clocks->phyclk_khz)
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- smu_req.display_count = 1;
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- else
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- smu_req.display_count = 0;
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+ /* dcn1 dppclk is tied to dispclk */
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+ if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, dccg->clks.dispclk_khz)) {
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+ dcn1_ramp_up_dispclk_with_dpp(dccg, new_clocks);
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+ dccg->clks.dispclk_khz = new_clocks->dispclk_khz;
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+
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+ send_request_to_lower = true;
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+ }
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+
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+ if (!send_request_to_increase && send_request_to_lower) {
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+ /*use dcfclk to request voltage*/
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+ clock_voltage_req.clk_type = DM_PP_CLOCK_TYPE_DCFCLK;
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+ clock_voltage_req.clocks_in_khz = dcn_find_dcfclk_suits_all(dc, new_clocks);
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+ dm_pp_apply_clock_for_voltage_request(dccg->ctx, &clock_voltage_req);
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+ if (pp_smu->set_display_requirement)
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+ pp_smu->set_display_requirement(&pp_smu->pp_smu, &smu_req);
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+ }
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- if (pp_smu->set_display_requirement)
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- pp_smu->set_display_requirement(&pp_smu->pp_smu, &smu_req);
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*smu_req_cur = smu_req;
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*smu_req_cur = smu_req;
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}
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}
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