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@@ -642,39 +642,6 @@ static void execlists_submit_request(struct drm_i915_gem_request *request)
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spin_unlock_bh(&engine->execlist_lock);
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}
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-static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
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- struct list_head *vmas)
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-{
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- const unsigned other_rings = ~intel_engine_flag(req->engine);
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- struct i915_vma *vma;
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- uint32_t flush_domains = 0;
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- bool flush_chipset = false;
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- int ret;
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-
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- list_for_each_entry(vma, vmas, exec_list) {
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- struct drm_i915_gem_object *obj = vma->obj;
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-
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- if (obj->active & other_rings) {
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- ret = i915_gem_object_sync(obj, req);
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- if (ret)
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- return ret;
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- }
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-
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- if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
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- flush_chipset |= i915_gem_clflush_object(obj, false);
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-
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- flush_domains |= obj->base.write_domain;
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- }
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-
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- if (flush_domains & I915_GEM_DOMAIN_GTT)
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- wmb();
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-
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- /* Unconditionally invalidate gpu caches and ensure that we do flush
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- * any residual writes from the previous batch.
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- */
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- return req->engine->emit_flush(req, EMIT_INVALIDATE);
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-}
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-
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int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request)
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{
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struct intel_engine_cs *engine = request->engine;
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@@ -776,96 +743,6 @@ intel_logical_ring_advance(struct drm_i915_gem_request *request)
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return 0;
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}
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-/**
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- * intel_execlists_submission() - submit a batchbuffer for execution, Execlists style
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- * @params: execbuffer call parameters.
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- * @args: execbuffer call arguments.
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- * @vmas: list of vmas.
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- *
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- * This is the evil twin version of i915_gem_ringbuffer_submission. It abstracts
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- * away the submission details of the execbuffer ioctl call.
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- *
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- * Return: non-zero if the submission fails.
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- */
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-int intel_execlists_submission(struct i915_execbuffer_params *params,
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- struct drm_i915_gem_execbuffer2 *args,
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- struct list_head *vmas)
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-{
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- struct drm_device *dev = params->dev;
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- struct intel_engine_cs *engine = params->engine;
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- struct drm_i915_private *dev_priv = to_i915(dev);
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- struct intel_ring *ring = params->request->ring;
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- u64 exec_start;
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- int instp_mode;
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- u32 instp_mask;
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- int ret;
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-
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- instp_mode = args->flags & I915_EXEC_CONSTANTS_MASK;
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- instp_mask = I915_EXEC_CONSTANTS_MASK;
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- switch (instp_mode) {
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- case I915_EXEC_CONSTANTS_REL_GENERAL:
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- case I915_EXEC_CONSTANTS_ABSOLUTE:
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- case I915_EXEC_CONSTANTS_REL_SURFACE:
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- if (instp_mode != 0 && engine->id != RCS) {
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- DRM_DEBUG("non-0 rel constants mode on non-RCS\n");
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- return -EINVAL;
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- }
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-
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- if (instp_mode != dev_priv->relative_constants_mode) {
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- if (instp_mode == I915_EXEC_CONSTANTS_REL_SURFACE) {
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- DRM_DEBUG("rel surface constants mode invalid on gen5+\n");
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- return -EINVAL;
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- }
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-
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- /* The HW changed the meaning on this bit on gen6 */
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- instp_mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
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- }
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- break;
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- default:
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- DRM_DEBUG("execbuf with unknown constants: %d\n", instp_mode);
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- return -EINVAL;
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- }
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-
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- if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
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- DRM_DEBUG("sol reset is gen7 only\n");
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- return -EINVAL;
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- }
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-
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- ret = execlists_move_to_gpu(params->request, vmas);
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- if (ret)
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- return ret;
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-
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- if (engine->id == RCS &&
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- instp_mode != dev_priv->relative_constants_mode) {
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- ret = intel_ring_begin(params->request, 4);
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- if (ret)
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- return ret;
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-
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- intel_ring_emit(ring, MI_NOOP);
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- intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
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- intel_ring_emit_reg(ring, INSTPM);
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- intel_ring_emit(ring, instp_mask << 16 | instp_mode);
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- intel_ring_advance(ring);
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-
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- dev_priv->relative_constants_mode = instp_mode;
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- }
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-
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- exec_start = params->batch_obj_vm_offset +
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- args->batch_start_offset;
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-
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- ret = engine->emit_bb_start(params->request,
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- exec_start, args->batch_len,
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- params->dispatch_flags);
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- if (ret)
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- return ret;
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-
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- trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
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-
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- i915_gem_execbuffer_move_to_active(vmas, params->request);
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-
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- return 0;
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-}
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-
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void intel_execlists_cancel_requests(struct intel_engine_cs *engine)
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{
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struct drm_i915_gem_request *req, *tmp;
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Chris Wilson