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@@ -24,11 +24,6 @@
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#include "mux.h"
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-#ifndef CONFIG_COMMON_CLK
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-#include "clock.h"
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-#include "psc.h"
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-#endif
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-
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/* Offsets of the 8 compare registers on the da830 */
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#define DA830_CMP12_0 0x60
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#define DA830_CMP12_1 0x64
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@@ -41,404 +36,6 @@
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#define DA830_REF_FREQ 24000000
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-#ifndef CONFIG_COMMON_CLK
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-static struct pll_data pll0_data = {
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- .num = 1,
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- .phys_base = DA8XX_PLL0_BASE,
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- .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
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-};
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-
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-static struct clk ref_clk = {
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- .name = "ref_clk",
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- .rate = DA830_REF_FREQ,
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-};
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-
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-static struct clk pll0_clk = {
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- .name = "pll0",
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- .parent = &ref_clk,
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- .pll_data = &pll0_data,
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- .flags = CLK_PLL,
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-};
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-
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-static struct clk pll0_aux_clk = {
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- .name = "pll0_aux_clk",
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- .parent = &pll0_clk,
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- .flags = CLK_PLL | PRE_PLL,
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-};
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-
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-static struct clk pll0_sysclk2 = {
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- .name = "pll0_sysclk2",
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- .parent = &pll0_clk,
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- .flags = CLK_PLL,
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- .div_reg = PLLDIV2,
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-};
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-
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-static struct clk pll0_sysclk3 = {
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- .name = "pll0_sysclk3",
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- .parent = &pll0_clk,
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- .flags = CLK_PLL,
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- .div_reg = PLLDIV3,
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-};
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-
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-static struct clk pll0_sysclk4 = {
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- .name = "pll0_sysclk4",
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- .parent = &pll0_clk,
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- .flags = CLK_PLL,
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- .div_reg = PLLDIV4,
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-};
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-
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-static struct clk pll0_sysclk5 = {
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- .name = "pll0_sysclk5",
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- .parent = &pll0_clk,
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- .flags = CLK_PLL,
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- .div_reg = PLLDIV5,
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-};
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-
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-static struct clk pll0_sysclk6 = {
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- .name = "pll0_sysclk6",
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- .parent = &pll0_clk,
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- .flags = CLK_PLL,
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- .div_reg = PLLDIV6,
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-};
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-
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-static struct clk pll0_sysclk7 = {
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- .name = "pll0_sysclk7",
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- .parent = &pll0_clk,
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- .flags = CLK_PLL,
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- .div_reg = PLLDIV7,
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-};
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-
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-static struct clk i2c0_clk = {
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- .name = "i2c0",
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- .parent = &pll0_aux_clk,
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-};
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-
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-static struct clk timerp64_0_clk = {
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- .name = "timer0",
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- .parent = &pll0_aux_clk,
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-};
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-
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-static struct clk timerp64_1_clk = {
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- .name = "timer1",
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- .parent = &pll0_aux_clk,
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-};
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-
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-static struct clk arm_rom_clk = {
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- .name = "arm_rom",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC0_ARM_RAM_ROM,
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- .flags = ALWAYS_ENABLED,
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-};
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-
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-static struct clk scr0_ss_clk = {
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- .name = "scr0_ss",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC0_SCR0_SS,
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- .flags = ALWAYS_ENABLED,
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-};
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-
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-static struct clk scr1_ss_clk = {
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- .name = "scr1_ss",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC0_SCR1_SS,
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- .flags = ALWAYS_ENABLED,
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-};
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-
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-static struct clk scr2_ss_clk = {
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- .name = "scr2_ss",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC0_SCR2_SS,
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- .flags = ALWAYS_ENABLED,
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-};
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-
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-static struct clk dmax_clk = {
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- .name = "dmax",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC0_PRUSS,
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- .flags = ALWAYS_ENABLED,
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-};
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-
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-static struct clk tpcc_clk = {
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- .name = "tpcc",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC0_TPCC,
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- .flags = ALWAYS_ENABLED | CLK_PSC,
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-};
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-
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-static struct clk tptc0_clk = {
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- .name = "tptc0",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC0_TPTC0,
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- .flags = ALWAYS_ENABLED,
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-};
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-
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-static struct clk tptc1_clk = {
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- .name = "tptc1",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC0_TPTC1,
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- .flags = ALWAYS_ENABLED,
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-};
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-
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-static struct clk mmcsd_clk = {
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- .name = "mmcsd",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC0_MMC_SD,
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-};
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-
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-static struct clk uart0_clk = {
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- .name = "uart0",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC0_UART0,
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-};
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-
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-static struct clk uart1_clk = {
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- .name = "uart1",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC1_UART1,
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- .gpsc = 1,
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-};
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-
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-static struct clk uart2_clk = {
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- .name = "uart2",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC1_UART2,
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- .gpsc = 1,
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-};
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-
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-static struct clk spi0_clk = {
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- .name = "spi0",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC0_SPI0,
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-};
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-
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-static struct clk spi1_clk = {
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- .name = "spi1",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC1_SPI1,
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- .gpsc = 1,
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-};
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-
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-static struct clk ecap0_clk = {
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- .name = "ecap0",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC1_ECAP,
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- .gpsc = 1,
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-};
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-
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-static struct clk ecap1_clk = {
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- .name = "ecap1",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC1_ECAP,
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- .gpsc = 1,
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-};
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-
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-static struct clk ecap2_clk = {
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- .name = "ecap2",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC1_ECAP,
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- .gpsc = 1,
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-};
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-
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-static struct clk pwm0_clk = {
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- .name = "pwm0",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC1_PWM,
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- .gpsc = 1,
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-};
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-
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-static struct clk pwm1_clk = {
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- .name = "pwm1",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC1_PWM,
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- .gpsc = 1,
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-};
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-
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-static struct clk pwm2_clk = {
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- .name = "pwm2",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC1_PWM,
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- .gpsc = 1,
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-};
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-
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-static struct clk eqep0_clk = {
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- .name = "eqep0",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA830_LPSC1_EQEP,
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- .gpsc = 1,
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-};
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-
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-static struct clk eqep1_clk = {
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- .name = "eqep1",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA830_LPSC1_EQEP,
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- .gpsc = 1,
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-};
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-
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-static struct clk lcdc_clk = {
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- .name = "lcdc",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC1_LCDC,
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- .gpsc = 1,
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-};
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-
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-static struct clk mcasp0_clk = {
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- .name = "mcasp0",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC1_McASP0,
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- .gpsc = 1,
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-};
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-
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-static struct clk mcasp1_clk = {
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- .name = "mcasp1",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA830_LPSC1_McASP1,
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- .gpsc = 1,
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-};
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-
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-static struct clk mcasp2_clk = {
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- .name = "mcasp2",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA830_LPSC1_McASP2,
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- .gpsc = 1,
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-};
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-
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-static struct clk usb20_clk = {
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- .name = "usb20",
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- .parent = &pll0_sysclk2,
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- .lpsc = DA8XX_LPSC1_USB20,
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- .gpsc = 1,
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-};
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-
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-static struct clk cppi41_clk = {
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- .name = "cppi41",
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- .parent = &usb20_clk,
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-};
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-
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-static struct clk aemif_clk = {
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- .name = "aemif",
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- .parent = &pll0_sysclk3,
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- .lpsc = DA8XX_LPSC0_EMIF25,
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- .flags = ALWAYS_ENABLED,
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-};
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-
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-static struct clk aintc_clk = {
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- .name = "aintc",
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- .parent = &pll0_sysclk4,
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- .lpsc = DA8XX_LPSC0_AINTC,
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- .flags = ALWAYS_ENABLED,
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-};
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-
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-static struct clk secu_mgr_clk = {
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- .name = "secu_mgr",
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- .parent = &pll0_sysclk4,
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- .lpsc = DA8XX_LPSC0_SECU_MGR,
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- .flags = ALWAYS_ENABLED,
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-};
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-
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-static struct clk emac_clk = {
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- .name = "emac",
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- .parent = &pll0_sysclk4,
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- .lpsc = DA8XX_LPSC1_CPGMAC,
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- .gpsc = 1,
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-};
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-
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-static struct clk gpio_clk = {
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- .name = "gpio",
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- .parent = &pll0_sysclk4,
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- .lpsc = DA8XX_LPSC1_GPIO,
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- .gpsc = 1,
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-};
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-
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-static struct clk i2c1_clk = {
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- .name = "i2c1",
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- .parent = &pll0_sysclk4,
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- .lpsc = DA8XX_LPSC1_I2C,
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- .gpsc = 1,
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-};
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-
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-static struct clk usb11_clk = {
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- .name = "usb11",
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- .parent = &pll0_sysclk4,
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- .lpsc = DA8XX_LPSC1_USB11,
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- .gpsc = 1,
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-};
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-
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-static struct clk emif3_clk = {
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- .name = "emif3",
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- .parent = &pll0_sysclk5,
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- .lpsc = DA8XX_LPSC1_EMIF3C,
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- .gpsc = 1,
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- .flags = ALWAYS_ENABLED,
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-};
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-
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-static struct clk arm_clk = {
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- .name = "arm",
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- .parent = &pll0_sysclk6,
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- .lpsc = DA8XX_LPSC0_ARM,
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- .flags = ALWAYS_ENABLED,
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-};
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-
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-static struct clk rmii_clk = {
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- .name = "rmii",
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- .parent = &pll0_sysclk7,
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-};
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-
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-static struct clk_lookup da830_clks[] = {
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- CLK(NULL, "ref", &ref_clk),
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- CLK(NULL, "pll0", &pll0_clk),
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- CLK(NULL, "pll0_aux", &pll0_aux_clk),
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- CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
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- CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
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- CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
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- CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
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- CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
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- CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
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- CLK("i2c_davinci.1", NULL, &i2c0_clk),
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- CLK(NULL, "timer0", &timerp64_0_clk),
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- CLK("davinci-wdt", NULL, &timerp64_1_clk),
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- CLK(NULL, "arm_rom", &arm_rom_clk),
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- CLK(NULL, "scr0_ss", &scr0_ss_clk),
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- CLK(NULL, "scr1_ss", &scr1_ss_clk),
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- CLK(NULL, "scr2_ss", &scr2_ss_clk),
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- CLK(NULL, "dmax", &dmax_clk),
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- CLK(NULL, "tpcc", &tpcc_clk),
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- CLK(NULL, "tptc0", &tptc0_clk),
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- CLK(NULL, "tptc1", &tptc1_clk),
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- CLK("da830-mmc.0", NULL, &mmcsd_clk),
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- CLK("serial8250.0", NULL, &uart0_clk),
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- CLK("serial8250.1", NULL, &uart1_clk),
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- CLK("serial8250.2", NULL, &uart2_clk),
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- CLK("spi_davinci.0", NULL, &spi0_clk),
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- CLK("spi_davinci.1", NULL, &spi1_clk),
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- CLK(NULL, "ecap0", &ecap0_clk),
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- CLK(NULL, "ecap1", &ecap1_clk),
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- CLK(NULL, "ecap2", &ecap2_clk),
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- CLK(NULL, "pwm0", &pwm0_clk),
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- CLK(NULL, "pwm1", &pwm1_clk),
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- CLK(NULL, "pwm2", &pwm2_clk),
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- CLK("eqep.0", NULL, &eqep0_clk),
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- CLK("eqep.1", NULL, &eqep1_clk),
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- CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
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- CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
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- CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
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- CLK("davinci-mcasp.2", NULL, &mcasp2_clk),
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- CLK("musb-da8xx", NULL, &usb20_clk),
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- CLK("cppi41-dmaengine", NULL, &cppi41_clk),
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- CLK(NULL, "aemif", &aemif_clk),
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- CLK(NULL, "aintc", &aintc_clk),
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- CLK(NULL, "secu_mgr", &secu_mgr_clk),
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|
- CLK("davinci_emac.1", NULL, &emac_clk),
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|
- CLK("davinci_mdio.0", "fck", &emac_clk),
|
|
|
- CLK(NULL, "gpio", &gpio_clk),
|
|
|
- CLK("i2c_davinci.2", NULL, &i2c1_clk),
|
|
|
- CLK("ohci-da8xx", NULL, &usb11_clk),
|
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|
- CLK(NULL, "emif3", &emif3_clk),
|
|
|
- CLK(NULL, "arm", &arm_clk),
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|
- CLK(NULL, "rmii", &rmii_clk),
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|
- CLK(NULL, NULL, NULL),
|
|
|
-};
|
|
|
-#endif
|
|
|
-
|
|
|
/*
|
|
|
* Device specific mux setup
|
|
|
*
|
|
@@ -1136,8 +733,6 @@ static struct map_desc da830_io_desc[] = {
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|
|
},
|
|
|
};
|
|
|
|
|
|
-static u32 da830_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
|
|
|
-
|
|
|
/* Contents of JTAG ID register used to identify exact cpu type */
|
|
|
static struct davinci_id da830_ids[] = {
|
|
|
{
|
|
@@ -1206,8 +801,6 @@ static const struct davinci_soc_info davinci_soc_info_da830 = {
|
|
|
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
|
|
|
.ids = da830_ids,
|
|
|
.ids_num = ARRAY_SIZE(da830_ids),
|
|
|
- .psc_bases = da830_psc_bases,
|
|
|
- .psc_bases_num = ARRAY_SIZE(da830_psc_bases),
|
|
|
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
|
|
|
.pinmux_pins = da830_pins,
|
|
|
.pinmux_pins_num = ARRAY_SIZE(da830_pins),
|
|
@@ -1229,7 +822,6 @@ void __init da830_init(void)
|
|
|
|
|
|
void __init da830_init_time(void)
|
|
|
{
|
|
|
-#ifdef CONFIG_COMMON_CLK
|
|
|
void __iomem *pll;
|
|
|
struct clk *clk;
|
|
|
|
|
@@ -1242,10 +834,6 @@ void __init da830_init_time(void)
|
|
|
clk = clk_get(NULL, "timer0");
|
|
|
|
|
|
davinci_timer_init(clk);
|
|
|
-#else
|
|
|
- davinci_clk_init(da830_clks);
|
|
|
- davinci_timer_init(&timerp64_0_clk);
|
|
|
-#endif
|
|
|
}
|
|
|
|
|
|
static struct resource da830_psc0_resources[] = {
|