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@@ -124,11 +124,6 @@ void flush_thread(void)
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fpu__clear(&tsk->thread.fpu);
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}
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-static void hard_disable_TSC(void)
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-{
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- cr4_set_bits(X86_CR4_TSD);
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-}
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-
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void disable_TSC(void)
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{
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preempt_disable();
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@@ -137,15 +132,10 @@ void disable_TSC(void)
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* Must flip the CPU state synchronously with
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* TIF_NOTSC in the current running context.
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*/
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- hard_disable_TSC();
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+ cr4_set_bits(X86_CR4_TSD);
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preempt_enable();
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}
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-static void hard_enable_TSC(void)
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-{
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- cr4_clear_bits(X86_CR4_TSD);
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-}
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-
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static void enable_TSC(void)
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{
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preempt_disable();
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@@ -154,7 +144,7 @@ static void enable_TSC(void)
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* Must flip the CPU state synchronously with
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* TIF_NOTSC in the current running context.
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*/
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- hard_enable_TSC();
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+ cr4_clear_bits(X86_CR4_TSD);
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preempt_enable();
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}
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@@ -233,12 +223,8 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
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wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
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}
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- if ((tifp ^ tifn) & _TIF_NOTSC) {
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- if (tifn & _TIF_NOTSC)
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- hard_disable_TSC();
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- else
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- hard_enable_TSC();
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- }
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+ if ((tifp ^ tifn) & _TIF_NOTSC)
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+ cr4_toggle_bits(X86_CR4_TSD);
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}
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/*
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