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@@ -1195,11 +1195,10 @@ static void gfx_v6_0_write_harvested_raster_configs(struct amdgpu_device *adev,
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if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) {
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raster_config_se &= ~PA_SC_RASTER_CONFIG__SE_MAP_MASK;
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- if (!se_mask[idx]) {
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+ if (!se_mask[idx])
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raster_config_se |= RASTER_CONFIG_SE_MAP_3 << PA_SC_RASTER_CONFIG__SE_MAP__SHIFT;
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- } else {
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+ else
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raster_config_se |= RASTER_CONFIG_SE_MAP_0 << PA_SC_RASTER_CONFIG__SE_MAP__SHIFT;
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- }
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}
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pkr0_mask &= rb_mask;
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@@ -1207,11 +1206,10 @@ static void gfx_v6_0_write_harvested_raster_configs(struct amdgpu_device *adev,
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if (rb_per_se > 2 && (!pkr0_mask || !pkr1_mask)) {
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raster_config_se &= ~PA_SC_RASTER_CONFIG__PKR_MAP_MASK;
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- if (!pkr0_mask) {
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+ if (!pkr0_mask)
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raster_config_se |= RASTER_CONFIG_PKR_MAP_3 << PA_SC_RASTER_CONFIG__PKR_MAP__SHIFT;
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- } else {
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+ else
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raster_config_se |= RASTER_CONFIG_PKR_MAP_0 << PA_SC_RASTER_CONFIG__PKR_MAP__SHIFT;
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- }
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}
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if (rb_per_se >= 2) {
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@@ -1223,13 +1221,12 @@ static void gfx_v6_0_write_harvested_raster_configs(struct amdgpu_device *adev,
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if (!rb0_mask || !rb1_mask) {
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raster_config_se &= ~PA_SC_RASTER_CONFIG__RB_MAP_PKR0_MASK;
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- if (!rb0_mask) {
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+ if (!rb0_mask)
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raster_config_se |=
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RASTER_CONFIG_RB_MAP_3 << PA_SC_RASTER_CONFIG__RB_MAP_PKR0__SHIFT;
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- } else {
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+ else
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raster_config_se |=
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RASTER_CONFIG_RB_MAP_0 << PA_SC_RASTER_CONFIG__RB_MAP_PKR0__SHIFT;
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- }
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}
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if (rb_per_se > 2) {
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@@ -1240,13 +1237,12 @@ static void gfx_v6_0_write_harvested_raster_configs(struct amdgpu_device *adev,
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if (!rb0_mask || !rb1_mask) {
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raster_config_se &= ~PA_SC_RASTER_CONFIG__RB_MAP_PKR1_MASK;
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- if (!rb0_mask) {
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+ if (!rb0_mask)
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raster_config_se |=
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RASTER_CONFIG_RB_MAP_3 << PA_SC_RASTER_CONFIG__RB_MAP_PKR1__SHIFT;
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- } else {
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+ else
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raster_config_se |=
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RASTER_CONFIG_RB_MAP_0 << PA_SC_RASTER_CONFIG__RB_MAP_PKR1__SHIFT;
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- }
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}
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}
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}
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