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@@ -31,28 +31,28 @@ static int i2c_mux_reg_set(const struct regmux *mux, unsigned int chan_id)
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if (!mux->data.reg)
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return -EINVAL;
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+ /*
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+ * Write to the register, followed by a read to ensure the write is
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+ * completed on a "posted" bus, for example PCI or write buffers.
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+ * The endianness of reading doesn't matter and the return data
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+ * is not used.
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+ */
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switch (mux->data.reg_size) {
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case 4:
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- if (mux->data.little_endian) {
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+ if (mux->data.little_endian)
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iowrite32(chan_id, mux->data.reg);
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- if (!mux->data.write_only)
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- ioread32(mux->data.reg);
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- } else {
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+ else
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iowrite32be(chan_id, mux->data.reg);
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- if (!mux->data.write_only)
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- ioread32(mux->data.reg);
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- }
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+ if (!mux->data.write_only)
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+ ioread32(mux->data.reg);
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break;
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case 2:
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- if (mux->data.little_endian) {
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+ if (mux->data.little_endian)
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iowrite16(chan_id, mux->data.reg);
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- if (!mux->data.write_only)
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- ioread16(mux->data.reg);
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- } else {
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+ else
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iowrite16be(chan_id, mux->data.reg);
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- if (!mux->data.write_only)
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- ioread16be(mux->data.reg);
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- }
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+ if (!mux->data.write_only)
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+ ioread16(mux->data.reg);
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break;
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case 1:
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iowrite8(chan_id, mux->data.reg);
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