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@@ -553,7 +553,7 @@ static void pineview_update_wm(struct drm_crtc *unused_crtc)
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crtc = single_enabled_crtc(dev);
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if (crtc) {
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const struct drm_display_mode *adjusted_mode;
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- int pixel_size = crtc->primary->fb->bits_per_pixel / 8;
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+ int pixel_size = crtc->primary->state->fb->bits_per_pixel / 8;
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int clock;
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adjusted_mode = &to_intel_crtc(crtc)->config->base.adjusted_mode;
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@@ -629,7 +629,7 @@ static bool g4x_compute_wm0(struct drm_device *dev,
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clock = adjusted_mode->crtc_clock;
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htotal = adjusted_mode->crtc_htotal;
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hdisplay = to_intel_crtc(crtc)->config->pipe_src_w;
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- pixel_size = crtc->primary->fb->bits_per_pixel / 8;
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+ pixel_size = crtc->primary->state->fb->bits_per_pixel / 8;
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/* Use the small buffer method to calculate plane watermark */
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entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000;
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@@ -716,7 +716,7 @@ static bool g4x_compute_srwm(struct drm_device *dev,
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clock = adjusted_mode->crtc_clock;
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htotal = adjusted_mode->crtc_htotal;
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hdisplay = to_intel_crtc(crtc)->config->pipe_src_w;
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- pixel_size = crtc->primary->fb->bits_per_pixel / 8;
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+ pixel_size = crtc->primary->state->fb->bits_per_pixel / 8;
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line_time_us = max(htotal * 1000 / clock, 1);
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line_count = (latency_ns / line_time_us + 1000) / 1000;
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@@ -799,7 +799,7 @@ static void vlv_update_drain_latency(struct drm_crtc *crtc)
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}
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/* Primary plane Drain Latency */
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- pixel_size = crtc->primary->fb->bits_per_pixel / 8; /* BPP */
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+ pixel_size = crtc->primary->state->fb->bits_per_pixel / 8; /* BPP */
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if (vlv_compute_drain_latency(crtc, pixel_size, &prec_mult, &drain_latency)) {
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plane_prec = (prec_mult == high_precision) ?
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DDL_PLANE_PRECISION_HIGH :
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@@ -1080,7 +1080,7 @@ static void i965_update_wm(struct drm_crtc *unused_crtc)
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int clock = adjusted_mode->crtc_clock;
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int htotal = adjusted_mode->crtc_htotal;
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int hdisplay = to_intel_crtc(crtc)->config->pipe_src_w;
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- int pixel_size = crtc->primary->fb->bits_per_pixel / 8;
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+ int pixel_size = crtc->primary->state->fb->bits_per_pixel / 8;
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unsigned long line_time_us;
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int entries;
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@@ -1157,7 +1157,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
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crtc = intel_get_crtc_for_plane(dev, 0);
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if (intel_crtc_active(crtc)) {
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const struct drm_display_mode *adjusted_mode;
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- int cpp = crtc->primary->fb->bits_per_pixel / 8;
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+ int cpp = crtc->primary->state->fb->bits_per_pixel / 8;
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if (IS_GEN2(dev))
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cpp = 4;
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@@ -1179,7 +1179,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
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crtc = intel_get_crtc_for_plane(dev, 1);
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if (intel_crtc_active(crtc)) {
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const struct drm_display_mode *adjusted_mode;
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- int cpp = crtc->primary->fb->bits_per_pixel / 8;
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+ int cpp = crtc->primary->state->fb->bits_per_pixel / 8;
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if (IS_GEN2(dev))
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cpp = 4;
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@@ -1202,7 +1202,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
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if (IS_I915GM(dev) && enabled) {
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struct drm_i915_gem_object *obj;
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- obj = intel_fb_obj(enabled->primary->fb);
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+ obj = intel_fb_obj(enabled->primary->state->fb);
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/* self-refresh seems busted with untiled */
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if (obj->tiling_mode == I915_TILING_NONE)
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@@ -1226,7 +1226,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
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int clock = adjusted_mode->crtc_clock;
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int htotal = adjusted_mode->crtc_htotal;
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int hdisplay = to_intel_crtc(enabled)->config->pipe_src_w;
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- int pixel_size = enabled->primary->fb->bits_per_pixel / 8;
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+ int pixel_size = enabled->primary->state->fb->bits_per_pixel / 8;
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unsigned long line_time_us;
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int entries;
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@@ -1924,7 +1924,7 @@ static void ilk_compute_wm_parameters(struct drm_crtc *crtc,
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p->active = true;
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p->pipe_htotal = intel_crtc->config->base.adjusted_mode.crtc_htotal;
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p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
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- p->pri.bytes_per_pixel = crtc->primary->fb->bits_per_pixel / 8;
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+ p->pri.bytes_per_pixel = crtc->primary->state->fb->bits_per_pixel / 8;
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p->cur.bytes_per_pixel = 4;
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p->pri.horiz_pixels = intel_crtc->config->pipe_src_w;
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p->cur.horiz_pixels = intel_crtc->base.cursor->state->crtc_w;
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@@ -2701,7 +2701,7 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc,
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*/
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p->plane[0].enabled = true;
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p->plane[0].bytes_per_pixel =
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- crtc->primary->fb->bits_per_pixel / 8;
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+ crtc->primary->state->fb->bits_per_pixel / 8;
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p->plane[0].horiz_pixels = intel_crtc->config->pipe_src_w;
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p->plane[0].vert_pixels = intel_crtc->config->pipe_src_h;
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p->plane[0].tiling = DRM_FORMAT_MOD_NONE;
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