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@@ -16,6 +16,7 @@
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compatible = "fsl,mpc8641hpcn";
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#address-cells = <1>;
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#size-cells = <1>;
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+ interrupt-parent = <&mpic>;
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aliases {
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ethernet0 = &enet0;
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@@ -66,8 +67,7 @@
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#size-cells = <1>;
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compatible = "fsl,mpc8641-localbus", "simple-bus";
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reg = <0xffe05000 0x1000>;
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- interrupts = <19 2>;
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- interrupt-parent = <&mpic>;
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+ interrupts = <19 2 0 0>;
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ranges = <0 0 0xef800000 0x00800000
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2 0 0xffdf8000 0x00008000
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@@ -118,8 +118,7 @@
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mcm@1000 {
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compatible = "fsl,mpc8641-mcm", "fsl,mcm";
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reg = <0x1000 0x1000>;
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- interrupts = <17 2>;
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- interrupt-parent = <&mpic>;
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+ interrupts = <17 2 0 0>;
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};
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i2c@3000 {
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@@ -128,8 +127,7 @@
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cell-index = <0>;
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compatible = "fsl-i2c";
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reg = <0x3000 0x100>;
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- interrupts = <43 2>;
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- interrupt-parent = <&mpic>;
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+ interrupts = <43 2 0 0>;
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dfsrr;
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};
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@@ -139,8 +137,7 @@
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cell-index = <1>;
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compatible = "fsl-i2c";
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reg = <0x3100 0x100>;
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- interrupts = <43 2>;
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- interrupt-parent = <&mpic>;
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+ interrupts = <43 2 0 0>;
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dfsrr;
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};
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@@ -156,32 +153,28 @@
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"fsl,eloplus-dma-channel";
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reg = <0x0 0x80>;
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cell-index = <0>;
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- interrupt-parent = <&mpic>;
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- interrupts = <20 2>;
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+ interrupts = <20 2 0 0>;
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};
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dma-channel@80 {
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compatible = "fsl,mpc8641-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <0x80 0x80>;
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cell-index = <1>;
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- interrupt-parent = <&mpic>;
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- interrupts = <21 2>;
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+ interrupts = <21 2 0 0>;
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};
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dma-channel@100 {
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compatible = "fsl,mpc8641-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <0x100 0x80>;
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cell-index = <2>;
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- interrupt-parent = <&mpic>;
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- interrupts = <22 2>;
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+ interrupts = <22 2 0 0>;
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};
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dma-channel@180 {
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compatible = "fsl,mpc8641-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <0x180 0x80>;
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cell-index = <3>;
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- interrupt-parent = <&mpic>;
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- interrupts = <23 2>;
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+ interrupts = <23 2 0 0>;
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};
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};
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@@ -195,8 +188,7 @@
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reg = <0x24000 0x1000>;
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ranges = <0x0 0x24000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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- interrupts = <29 2 30 2 34 2>;
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- interrupt-parent = <&mpic>;
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+ interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
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tbi-handle = <&tbi0>;
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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@@ -208,23 +200,19 @@
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reg = <0x520 0x20>;
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phy0: ethernet-phy@0 {
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- interrupt-parent = <&mpic>;
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- interrupts = <10 1>;
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+ interrupts = <10 1 0 0>;
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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- interrupt-parent = <&mpic>;
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- interrupts = <10 1>;
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+ interrupts = <10 1 0 0>;
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reg = <1>;
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};
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phy2: ethernet-phy@2 {
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- interrupt-parent = <&mpic>;
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- interrupts = <10 1>;
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+ interrupts = <10 1 0 0>;
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reg = <2>;
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};
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phy3: ethernet-phy@3 {
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- interrupt-parent = <&mpic>;
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- interrupts = <10 1>;
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+ interrupts = <10 1 0 0>;
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reg = <3>;
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};
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tbi0: tbi-phy@11 {
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@@ -244,8 +232,7 @@
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reg = <0x25000 0x1000>;
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ranges = <0x0 0x25000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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- interrupts = <35 2 36 2 40 2>;
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- interrupt-parent = <&mpic>;
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+ interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
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tbi-handle = <&tbi1>;
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phy-handle = <&phy1>;
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phy-connection-type = "rgmii-id";
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@@ -273,8 +260,7 @@
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reg = <0x26000 0x1000>;
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ranges = <0x0 0x26000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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- interrupts = <31 2 32 2 33 2>;
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- interrupt-parent = <&mpic>;
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+ interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
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tbi-handle = <&tbi2>;
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phy-handle = <&phy2>;
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phy-connection-type = "rgmii-id";
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@@ -302,8 +288,7 @@
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reg = <0x27000 0x1000>;
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ranges = <0x0 0x27000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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- interrupts = <37 2 38 2 39 2>;
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- interrupt-parent = <&mpic>;
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+ interrupts = <37 2 0 0 38 2 0 0 39 2 0 0>;
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tbi-handle = <&tbi3>;
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phy-handle = <&phy3>;
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phy-connection-type = "rgmii-id";
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@@ -327,8 +312,7 @@
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compatible = "fsl,ns16550", "ns16550";
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reg = <0x4500 0x100>;
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clock-frequency = <0>;
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- interrupts = <42 2>;
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- interrupt-parent = <&mpic>;
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+ interrupts = <42 2 0 0>;
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};
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serial1: serial@4600 {
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@@ -337,16 +321,15 @@
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compatible = "fsl,ns16550", "ns16550";
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reg = <0x4600 0x100>;
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clock-frequency = <0>;
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- interrupts = <28 2>;
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- interrupt-parent = <&mpic>;
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+ interrupts = <28 2 0 0>;
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};
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mpic: pic@40000 {
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interrupt-controller;
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#address-cells = <0>;
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- #interrupt-cells = <2>;
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+ #interrupt-cells = <4>;
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reg = <0x40000 0x40000>;
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- compatible = "chrp,open-pic";
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+ compatible = "fsl,mpic", "chrp,open-pic";
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device_type = "open-pic";
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};
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@@ -361,27 +344,27 @@
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compatible = "fsl,srio-msg-unit";
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reg = <0x0 0x100>;
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interrupts = <
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- 53 2 /* msg1_tx_irq */
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- 54 2>;/* msg1_rx_irq */
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+ 53 2 0 0 /* msg1_tx_irq */
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+ 54 2 0 0>;/* msg1_rx_irq */
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};
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message-unit@100 {
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compatible = "fsl,srio-msg-unit";
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reg = <0x100 0x100>;
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interrupts = <
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- 55 2 /* msg2_tx_irq */
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- 56 2>;/* msg2_rx_irq */
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+ 55 2 0 0 /* msg2_tx_irq */
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+ 56 2 0 0>;/* msg2_rx_irq */
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};
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doorbell-unit@400 {
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compatible = "fsl,srio-dbell-unit";
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reg = <0x400 0x80>;
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interrupts = <
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- 49 2 /* bell_outb_irq */
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- 50 2>;/* bell_inb_irq */
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+ 49 2 0 0 /* bell_outb_irq */
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+ 50 2 0 0>;/* bell_inb_irq */
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};
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port-write-unit@4e0 {
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compatible = "fsl,srio-port-write-unit";
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reg = <0x4e0 0x20>;
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- interrupts = <48 2>;
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+ interrupts = <48 2 0 0>;
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};
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};
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@@ -395,16 +378,14 @@
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pci0: pcie@ffe08000 {
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compatible = "fsl,mpc8641-pcie";
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device_type = "pci";
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- #interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xffe08000 0x1000>;
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bus-range = <0x0 0xff>;
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ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
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0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>;
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- clock-frequency = <33333333>;
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- interrupt-parent = <&mpic>;
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- interrupts = <24 2>;
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+ clock-frequency = <100000000>;
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+ interrupts = <24 2 0 0>;
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interrupt-map-mask = <0xff00 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x11 func 0 - PCI slot 1 */
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@@ -545,7 +526,6 @@
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0x0 0x00010000>;
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isa@1e {
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device_type = "isa";
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- #interrupt-cells = <2>;
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#size-cells = <1>;
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#address-cells = <2>;
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reg = <0xf000 0 0 0 0>;
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@@ -562,8 +542,7 @@
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#address-cells = <0>;
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#interrupt-cells = <2>;
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compatible = "chrp,iic";
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- interrupts = <9 2>;
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- interrupt-parent = <&mpic>;
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+ interrupts = <9 2 0 0>;
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};
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i8042@60 {
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@@ -571,8 +550,7 @@
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#address-cells = <1>;
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reg = <1 0x60 1 1 0x64 1>;
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interrupts = <1 3 12 3>;
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- interrupt-parent =
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- <&i8259>;
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+ interrupt-parent = <&i8259>;
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keyboard@0 {
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reg = <0>;
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@@ -603,16 +581,14 @@
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pci1: pcie@ffe09000 {
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compatible = "fsl,mpc8641-pcie";
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device_type = "pci";
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- #interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xffe09000 0x1000>;
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bus-range = <0 0xff>;
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ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
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0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>;
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- clock-frequency = <33333333>;
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- interrupt-parent = <&mpic>;
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- interrupts = <25 2>;
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+ clock-frequency = <100000000>;
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+ interrupts = <25 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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@@ -644,8 +620,7 @@
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rapidio@ffec0000 {
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reg = <0xffec0000 0x11000>;
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compatible = "fsl,srio";
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- interrupt-parent = <&mpic>;
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- interrupts = <48 2>;
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+ interrupts = <48 2 0 0>;
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#address-cells = <2>;
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#size-cells = <2>;
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fsl,srio-rmu-handle = <&rmu>;
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